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Updated pic init

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This commit is contained in:
Rick Rongen
2021-08-22 19:59:55 +02:00
parent 6b0f6ddfb7
commit ad023a8119
5 changed files with 76 additions and 88 deletions
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16
kernel/cpu/cpuidx.c
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@@ -16,18 +16,16 @@ union cpu_name {
};
};
static bool has_apic() {
uint32_t eax, unused, edx;
__get_cpuid(CPUID_FEATURE_FLAGS, &eax, &unused, &unused, &edx);
return edx & CPUID_FEAT_EDX_APIC;
}
void cpuidx_print_info() {
union cpu_name name;
__get_cpuid(0, NULL, &name.parts[0], &name.parts[2], &name.parts[1]);
__get_cpuid(CPUID_VENDOR_ID, NULL, &name.parts[0], &name.parts[2], &name.parts[1]);
name.end = 0;
printf("CPU: %s\n", &name.name);
cpu_features_ecx features_ecx;
cpu_features_edx features_edx;
__get_cpuid(1, NULL, NULL, (uint32_t *) &features_ecx, (uint32_t *) &features_edx);
printf("");
}

16
kernel/cpu/isr.c
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@@ -7,6 +7,7 @@
#include <myke/cpu/isr.h>
#include <myke/debug/debug.h>
#include <myke/cpu/idt.h>
#include <myke/cpu/pic.h>
#include <myke/cpu/syscall_handler.h>
#include <myke/drivers/ports.h>
#include <myke/libk/libk.h>
@@ -52,19 +53,10 @@ void isr_install() {
// Remap the PIC
// todo make readable
port_byte_out(0x20, 0x11);
port_byte_out(0xA0, 0x11);
port_byte_out(0x21, 0x20);
port_byte_out(0xA1, 0x28);
port_byte_out(0x21, 0x04);
port_byte_out(0xA1, 0x02);
port_byte_out(0x21, 0x01);
port_byte_out(0xA1, 0x01);
port_byte_out(0x21, 0x0);
port_byte_out(0xA1, 0x0);
pic_init();
// Install the IRQs
set_idt_gate(32, (uint32_t) irq0);
set_idt_gate(32, (uint32_t) irq0); // 0x20
set_idt_gate(33, (uint32_t) irq1);
set_idt_gate(34, (uint32_t) irq2);
set_idt_gate(35, (uint32_t) irq3);
@@ -72,7 +64,7 @@ void isr_install() {
set_idt_gate(37, (uint32_t) irq5);
set_idt_gate(38, (uint32_t) irq6);
set_idt_gate(39, (uint32_t) irq7);
set_idt_gate(40, (uint32_t) irq8);
set_idt_gate(40, (uint32_t) irq8); // 0x28
set_idt_gate(41, (uint32_t) irq9);
set_idt_gate(42, (uint32_t) irq10);
set_idt_gate(43, (uint32_t) irq11);

43
kernel/cpu/pic.c Normal file
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@@ -0,0 +1,43 @@
//
// Created by rick on 22-08-21.
//
#include <myke/cpu/pic.h>
#include <myke/drivers/ports.h>
// https://wiki.osdev.org/8259_PIC
#define ICW1_ICW4 0x01 /* ICW4 (not) needed */
#define ICW1_SINGLE 0x02 /* Single (cascade) mode */
#define ICW1_INTERVAL4 0x04 /* Call address interval 4 (8) */
#define ICW1_LEVEL 0x08 /* Level triggered (edge) mode */
#define ICW1_INIT 0x10 /* Initialization - required! */
#define ICW4_8086 0x01 /* 8086/88 (MCS-80/85) mode */
#define ICW4_AUTO 0x02 /* Auto (normal) EOI */
#define ICW4_BUF_SLAVE 0x08 /* Buffered mode/slave */
#define ICW4_BUF_MASTER 0x0C /* Buffered mode/master */
#define ICW4_SFNM 0x10 /* Special fully nested (not) */
void pic_init() {
// init both master and slave pic's
port_byte_out(PORT_PIC_MASTER_COMMAND, ICW1_INIT | ICW1_ICW4);
port_byte_out(PORT_PIC_SLAVE_COMMAND, ICW1_INIT | ICW1_ICW4);
// master with ICW4 offset 20, Slave on IRQ2, 8086 mode,
// ICW2
port_byte_out(PORT_PIC_MASTER_DATA, 0x20); // offset master
port_byte_out(PORT_PIC_SLAVE_DATA, 0x28); // offset slave
// ICW3
port_byte_out(PORT_PIC_MASTER_DATA, 0x04); // slave PIC at IRQ2
port_byte_out(PORT_PIC_SLAVE_DATA, 0x02); // cascade identity
// ICW4
port_byte_out(PORT_PIC_MASTER_DATA, ICW4_8086); // 8086 mode
port_byte_out(PORT_PIC_SLAVE_DATA, ICW4_8086);
// empty mask
pic_set_mask(0);
}
void pic_set_mask(uint16_t mask) {
port_byte_out(PORT_PIC_MASTER_DATA, mask & 0xFF);
port_byte_out(PORT_PIC_SLAVE_DATA, mask << 8);
}