feat: reformatted code base to be more standard

include/myke/attributes.h

@@ -0,0 +1,19 @@
+//
+// Created by rick on 24-02-21.
+//
+
+#ifndef NEW_KERNEL_ATTRIBUTES_H
+#define NEW_KERNEL_ATTRIBUTES_H
+
+// generic
+#define used __attribute((used))
+
+// function
+#define noreturn __attribute((noreturn))
+#define cdecl __attribute((cdecl))
+// structure
+#define packed __attribute((packed))
+// field
+#define at_aligned(size) __attribute((aligned(size)))
+
+#endif //NEW_KERNEL_ATTRIBUTES_H

include/myke/command.h

@@ -0,0 +1,14 @@
+//
+// Created by rick on 23-02-21.
+//
+
+#ifndef NEW_KERNEL_COMMAND_H
+#define NEW_KERNEL_COMMAND_H
+
+#include "multiboot.h"
+
+void store_bootloader_info(multiboot_info_t *multiboot_info);
+
+void main_loop(void* data);
+
+#endif //NEW_KERNEL_COMMAND_H

include/myke/cpu/cpu.h

@@ -0,0 +1,20 @@
+//
+// Created by rick on 22-02-21.
+//
+
+#ifndef NEW_KERNEL_CPU_H
+#define NEW_KERNEL_CPU_H
+#include <sys/types.h>
+
+typedef struct {
+    uint32_t edi, esi, ebx, ebp, eip;
+} task_registers_t;
+
+typedef struct {
+    uint32_t ds; // pushed in common handler
+    uint32_t edi, esi, ebp, esp, ebx, edx, ecx, eax; // pusha/popa
+    uint32_t int_no, err_code; // pushed by handlers
+    uint32_t eip, cs, eflags, useresp, ss; // isr/iret
+} isr_registers_t;
+
+#endif //NEW_KERNEL_CPU_H

include/myke/cpu/cpuidx.h

@@ -0,0 +1,139 @@
+//
+// Created by rick on 12-02-21.
+//
+
+#ifndef NEW_KERNEL_CPUIDX_H
+#define NEW_KERNEL_CPUIDX_H
+
+#include <stdbool.h>
+
+typedef struct {
+    bool sse3: 1;
+    bool pclmul: 1;
+    bool dtes64: 1;
+    bool monitor: 1;
+    bool ds_cpl: 1;
+    bool vmx: 1;
+    bool smx: 1;
+    bool est: 1;
+    bool tm2: 1;
+    bool ssse3: 1;
+    bool cid: 1;
+    bool reserved: 1;
+    bool fma: 1;
+    bool cx16: 1;
+    bool etprd: 1;
+    bool pdcm: 1;
+    bool pcide: 1;
+    bool dca: 1;
+    bool sse4_1: 1;
+    bool sse4_2: 1;
+    bool x2APIC: 1;
+    bool movbe: 1;
+    bool popcnt: 1;
+    bool reserved2: 1;
+    bool aes: 1;
+    bool xsave: 1;
+    bool osxsave: 1;
+    bool avx: 1;
+} cpu_features_ecx ;
+
+typedef struct {
+    bool fpu: 1;
+    bool vme: 1;
+    bool de: 1;
+    bool pse: 1;
+    bool tsc: 1;
+    bool msr: 1;
+    bool pae: 1;
+    bool mce: 1;
+    bool cx8: 1;
+    bool apic: 1;
+    bool reserved: 1;
+    bool sep: 1;
+    bool mtrr: 1;
+    bool pge: 1;
+    bool mca: 1;
+    bool cmov: 1;
+    bool pat: 1;
+    bool pse36: 1;
+    bool psn: 1;
+    bool clf: 1;
+    bool reserved2: 1;
+    bool dtes: 1;
+    bool acpi: 1;
+    bool mmx: 1;
+    bool fxsr: 1;
+    bool sse: 1;
+    bool sse2: 1;
+    bool ss: 1;
+    bool htt: 1;
+    bool tm1: 1;
+    bool ia64: 1;
+    bool pbe: 1;
+
+} cpu_features_edx ;
+
+enum cpu_features {
+    CPUID_FEAT_ECX_SSE3 = 1 << 0,
+    CPUID_FEAT_ECX_PCLMUL = 1 << 1,
+    CPUID_FEAT_ECX_DTES64 = 1 << 2,
+    CPUID_FEAT_ECX_MONITOR = 1 << 3,
+    CPUID_FEAT_ECX_DS_CPL = 1 << 4,
+    CPUID_FEAT_ECX_VMX = 1 << 5,
+    CPUID_FEAT_ECX_SMX = 1 << 6,
+    CPUID_FEAT_ECX_EST = 1 << 7,
+    CPUID_FEAT_ECX_TM2 = 1 << 8,
+    CPUID_FEAT_ECX_SSSE3 = 1 << 9,
+    CPUID_FEAT_ECX_CID = 1 << 10,
+    CPUID_FEAT_ECX_FMA = 1 << 12,
+    CPUID_FEAT_ECX_CX16 = 1 << 13,
+    CPUID_FEAT_ECX_ETPRD = 1 << 14,
+    CPUID_FEAT_ECX_PDCM = 1 << 15,
+    CPUID_FEAT_ECX_PCIDE = 1 << 17,
+    CPUID_FEAT_ECX_DCA = 1 << 18,
+    CPUID_FEAT_ECX_SSE4_1 = 1 << 19,
+    CPUID_FEAT_ECX_SSE4_2 = 1 << 20,
+    CPUID_FEAT_ECX_x2APIC = 1 << 21,
+    CPUID_FEAT_ECX_MOVBE = 1 << 22,
+    CPUID_FEAT_ECX_POPCNT = 1 << 23,
+    CPUID_FEAT_ECX_AES = 1 << 25,
+    CPUID_FEAT_ECX_XSAVE = 1 << 26,
+    CPUID_FEAT_ECX_OSXSAVE = 1 << 27,
+    CPUID_FEAT_ECX_AVX = 1 << 28,
+
+    CPUID_FEAT_EDX_FPU = 1 << 0,
+    CPUID_FEAT_EDX_VME = 1 << 1,
+    CPUID_FEAT_EDX_DE = 1 << 2,
+    CPUID_FEAT_EDX_PSE = 1 << 3,
+    CPUID_FEAT_EDX_TSC = 1 << 4,
+    CPUID_FEAT_EDX_MSR = 1 << 5,
+    CPUID_FEAT_EDX_PAE = 1 << 6,
+    CPUID_FEAT_EDX_MCE = 1 << 7,
+    CPUID_FEAT_EDX_CX8 = 1 << 8,
+    CPUID_FEAT_EDX_APIC = 1 << 9,
+    CPUID_FEAT_EDX_SEP = 1 << 11,
+    CPUID_FEAT_EDX_MTRR = 1 << 12,
+    CPUID_FEAT_EDX_PGE = 1 << 13,
+    CPUID_FEAT_EDX_MCA = 1 << 14,
+    CPUID_FEAT_EDX_CMOV = 1 << 15,
+    CPUID_FEAT_EDX_PAT = 1 << 16,
+    CPUID_FEAT_EDX_PSE36 = 1 << 17,
+    CPUID_FEAT_EDX_PSN = 1 << 18,
+    CPUID_FEAT_EDX_CLF = 1 << 19,
+    CPUID_FEAT_EDX_DTES = 1 << 21,
+    CPUID_FEAT_EDX_ACPI = 1 << 22,
+    CPUID_FEAT_EDX_MMX = 1 << 23,
+    CPUID_FEAT_EDX_FXSR = 1 << 24,
+    CPUID_FEAT_EDX_SSE = 1 << 25,
+    CPUID_FEAT_EDX_SSE2 = 1 << 26,
+    CPUID_FEAT_EDX_SS = 1 << 27,
+    CPUID_FEAT_EDX_HTT = 1 << 28,
+    CPUID_FEAT_EDX_TM1 = 1 << 29,
+    CPUID_FEAT_EDX_IA64 = 1 << 30,
+    CPUID_FEAT_EDX_PBE = 1 << 31
+};
+
+void cpuidx_print_info();
+
+#endif //NEW_KERNEL_CPUIDX_H

include/myke/cpu/idt.h

@@ -0,0 +1,37 @@
+//
+// Created by rick on 8/18/19.
+//
+#include <sys/types.h>
+
+#ifndef MY_KERNEL_IDT_H
+#define MY_KERNEL_IDT_H
+#include <myke/attributes.h>
+
+#define KERNEL_CS 0x08
+
+/* How every interrupt gate (handler) is defined */
+typedef struct {
+    uint16_t low_offset; /* Lower 16 bits of handler function address */
+    uint16_t sel; /* Kernel segment selector */
+    uint8_t always0;
+    /* First byte
+     * Bit 7: "Interrupt is present"
+     * Bits 6-5: Privilege level of caller (0=kernel..3=user)
+     * Bit 4: Set to 0 for interrupt gates
+     * Bits 3-0: bits 1110 = decimal 14 = "32 bit interrupt gate" */
+    uint8_t flags;
+    uint16_t high_offset; /* Higher 16 bits of handler function address */
+} packed idt_gate_t;
+
+typedef struct {
+    uint16_t limit;
+    uint32_t base;
+} packed idt_register_t;
+
+#define IDT_REGISTERS 256
+
+void set_idt_gate(int n, uint32_t handler);
+
+void set_idt();
+
+#endif //MY_KERNEL_IDT_H

include/myke/cpu/isr.h

@@ -0,0 +1,137 @@
+//
+// Created by rick on 8/18/19.
+//
+
+#include <sys/types.h>
+
+#ifndef MY_KERNEL_ISR_H
+#define MY_KERNEL_ISR_H
+
+#include <myke/cpu/cpu.h>
+
+/* ISRs reserved for CPU exceptions */
+extern void isr0();
+
+extern void isr1();
+
+extern void isr2();
+
+extern void isr3();
+
+extern void isr4();
+
+extern void isr5();
+
+extern void isr6();
+
+extern void isr7();
+
+extern void isr8();
+
+extern void isr9();
+
+extern void isr10();
+
+extern void isr11();
+
+extern void isr12();
+
+extern void isr13();
+
+extern void isr14();
+
+extern void isr15();
+
+extern void isr16();
+
+extern void isr17();
+
+extern void isr18();
+
+extern void isr19();
+
+extern void isr20();
+
+extern void isr21();
+
+extern void isr22();
+
+extern void isr23();
+
+extern void isr24();
+
+extern void isr25();
+
+extern void isr26();
+
+extern void isr27();
+
+extern void isr28();
+
+extern void isr29();
+
+extern void isr30();
+
+extern void isr31();
+
+/* IRQ definitions */
+extern void irq0();
+
+extern void irq1();
+
+extern void irq2();
+
+extern void irq3();
+
+extern void irq4();
+
+extern void irq5();
+
+extern void irq6();
+
+extern void irq7();
+
+extern void irq8();
+
+extern void irq9();
+
+extern void irq10();
+
+extern void irq11();
+
+extern void irq12();
+
+extern void irq13();
+
+extern void irq14();
+
+extern void irq15();
+
+extern void isr128();
+
+#define IRQ0 32
+#define IRQ1 33
+#define IRQ2 34
+#define IRQ3 35
+#define IRQ4 36
+#define IRQ5 37
+#define IRQ6 38
+#define IRQ7 39
+#define IRQ8 40
+#define IRQ9 41
+#define IRQ10 42
+#define IRQ11 43
+#define IRQ12 44
+#define IRQ13 45
+#define IRQ14 46
+#define IRQ15 47
+
+typedef void (*isr_t)(isr_registers_t*);
+
+void register_interrupt_handler(uint8_t n, isr_t handler);
+
+void isr_install();
+
+void isr_handler(isr_registers_t r);
+
+#endif //MY_KERNEL_ISR_H

include/myke/cpu/syscall_handler.h

@@ -0,0 +1,11 @@
+//
+// Created by rick on 24-02-21.
+//
+
+#ifndef NEW_KERNEL_SYSCALL_HANDLER_H
+#define NEW_KERNEL_SYSCALL_HANDLER_H
+#include <myke/cpu/cpu.h>
+
+void syscall_handle(isr_registers_t *registers);
+
+#endif //NEW_KERNEL_SYSCALL_HANDLER_H

include/myke/cpu/timer.h

@@ -0,0 +1,18 @@
+//
+// Created by rick on 9/22/19.
+//
+
+#ifndef MY_KERNEL_TIMER_H
+#define MY_KERNEL_TIMER_H
+
+#include <sys/types.h>
+
+int init_timer(uint32_t freq);
+
+void print_current_tick();
+
+uint32_t timer_get_tick();
+
+void sleep(uint32_t milliseconds);
+
+#endif //MY_KERNEL_TIMER_H

include/myke/debug/debug.h

@@ -0,0 +1,18 @@
+//
+// Created by rick on 08-03-21.
+//
+
+#ifndef NEW_KERNEL_DEBUG_H
+#define NEW_KERNEL_DEBUG_H
+
+#include <stdbool.h>
+
+#ifdef DEBUG_INIT
+#include <multiboot.h>
+
+void debug_store_info(struct multiboot_info *info);
+#endif
+
+void debug_backtrace(bool do_sync);
+
+#endif //NEW_KERNEL_DEBUG_H

include/myke/driver.h

@@ -0,0 +1,22 @@
+//
+// Created by rick on 06-03-21.
+//
+
+#ifndef NEW_KERNEL_DRIVER_H
+#define NEW_KERNEL_DRIVER_H
+#include <myke/attributes.h>
+#include <myke/preprocessor_format_zero.h>
+
+#ifndef STRUCT_ALIGNMENT
+#define STRUCT_ALIGNMENT 16
+#endif
+#define DRIVER_CAT(a, b) DRIVER_DUMMY() a ## _ ## b
+#define DRIVER_DUMMY()
+#define SECT_NAME_(a,b) "." #a "." #b
+#define SECT_NAME(a,b) SECT_NAME_(a, b)
+
+#define GENERIC_DRIVER(drivername, order) \
+    static struct drivername DRIVER_CAT(drivername, counter) \
+    __attribute((__used__, __section__(SECT_NAME(drivername, FORMAT_3_ZERO(order)))))
+
+#endif //NEW_KERNEL_DRIVER_H

include/myke/drivers/ide.h

@@ -0,0 +1,14 @@
+//
+// Created by rick on 03-02-21.
+//
+
+#ifndef NEW_KERNEL_IDE_H
+#define NEW_KERNEL_IDE_H
+
+#include <sys/types.h>
+
+uint8_t ide_access(uint8_t direction, uint8_t drive, uint32_t lba, uint8_t numsects, void *target);
+
+void ide_print_devices();
+
+#endif //NEW_KERNEL_IDE_H

include/myke/drivers/keyboard.h

@@ -0,0 +1,30 @@
+//
+// Created by rick on 23-03-20.
+//
+
+#ifndef MY_KERNEL_KEYBOARD_H
+#define MY_KERNEL_KEYBOARD_H
+
+#include <sys/types.h>
+
+typedef struct KeyEvent_t {
+//    KeyCode key;
+    uint32_t scancode;
+    char ascii_code;
+    uint8_t is_release: 1;
+    uint8_t shift: 1;
+    uint8_t alt: 1;
+    uint8_t ctrl: 1;
+} KeyEvent;
+
+char getc();
+
+void init_keyboard();
+
+//const char *key_code_to_string(KeyCode key);
+
+KeyEvent *get_next_event();
+
+void free_event(KeyEvent *event);
+
+#endif //MY_KERNEL_KEYBOARD_H

include/myke/drivers/pci.h

@@ -0,0 +1,243 @@
+//
+// Created by rick on 02-02-21.
+//
+
+#ifndef NEW_KERNEL_PCI_H
+#define NEW_KERNEL_PCI_H
+
+#include <sys/types.h>
+#include <myke/driver.h>
+#include <stdbool.h>
+#include <myke/attributes.h>
+
+#define PCI_CLASS_MASS_STORAGE  0x01
+#define PCI_CLASS_BRIDGE        0x06
+
+// class MASS STORAGE       0x01
+#define PCI_SUB_CLASS_IDE   0x01
+
+// class BRIDGE 0x06
+#define PCI_SUB_CLASS_PCI_PCI_BRIDGE_4 0x04
+#define PCI_SUB_CLASS_PCI_PCI_BRIDGE_9 0x09
+
+#define PCI_REGISTER_OK         0
+#define PCI_REGISTER_ERR_FULL   (-1)
+
+#define PCI_VALIDATE_OK     0
+#define PCI_VALIDATE_FAIL   1
+
+#define PCI_INIT_OK     0
+#define PCI_INIT_FAIL   1
+
+#define PCI_USE_OK     0
+#define PCI_USE_FAIL   1
+
+#define PCI_HEADER_TYPE_MULTI_FUNC 0x80
+#define PCI_HEADER_TYPE_ENDPOINT 0x00
+#define PCI_HEADER_TYPE_PCI_PCI_BRIDGE 0x01
+#define PCI_HEADER_TYPE_PCI_CARDBUS_BRIDGE 0x02
+
+
+#define PCI_CONFIG_VENDOR_ID            0x00
+#define PCI_CONFIG_DEVICE_ID            0x02
+#define PCI_CONFIG_COMMAND              0x04
+#define PCI_CONFIG_STATUS               0x06
+#define PCI_CONFIG_REVISION_ID          0x08
+#define PCI_CONFIG_PROG_IF              0x09
+#define PCI_CONFIG_SUBCLASS             0x0A
+#define PCI_CONFIG_CLASS_CODE           0x0B
+#define PCI_CONFIG_CACHE_LINE_SIZE      0x0C
+#define PCI_CONFIG_LATENCY_TIMER        0x0D
+#define PCI_CONFIG_HEADER_TYPE          0x0E
+#define PCI_CONFIG_BIST                 0x0F
+#define PCI_CONFIG_BAR0                 0x10
+#define PCI_CONFIG_BAR1                 0x14
+#define PCI_CONFIG_BAR2                 0x18
+#define PCI_CONFIG_BAR3                 0x1C
+#define PCI_CONFIG_BAR4                 0x20
+#define PCI_CONFIG_BAR5                 0x24
+#define PCI_CONFIG_CARDBUS_CIS_P        0x28
+#define PCI_CONFIG_SUBSYSTEM_VENDOR_ID  0x2C
+#define PCI_CONFIG_SUBSYSTEM_ID         0x2E
+#define PCI_CONFIG_EXPANSION_ROM_ADDR   0x30
+#define PCI_CONFIG_CAP_POINTER          0x34
+#define PCI_CONFIG_INTERRUPT_LINE       0x3C
+#define PCI_CONFIG_INTERRUPT_PIN        0x3D
+#define PCI_CONFIG_MAX_GRANT            0x3E
+#define PCI_CONFIG_MAX_LATENCY          0x3F
+
+// header type 1
+#define PCI_CONFIG_PRIMARY_BUS_NUMBER   0x18
+#define PCI_CONFIG_SECONDARY_BUS_NUMBER 0x19
+#define PCI_CONFIG_SUBORDINATE_BUS_NUMBER   0x1A
+#define PCI_CONFIG_SECONDARY_LATENCY_TIMER  0x1B
+#define PCI_CONFIG_IO_BASE              0x1C
+#define PCI_CONFIG_IO_LIMIT             0x1D
+#define PCI_CONFIG_SECONDARY_STATUS     0x1E
+#define PCI_CONFIG_MEMORY_BASE          0x20
+#define PCI_CONFIG_MEMORY_LIMIT         0x22
+#define PCI_CONFIG_MEMORY_BASE_UPPER    0x28
+#define PCI_CONFIG_MEMORY_LIMIT_UPPER   0x2C
+#define PCI_CONFIG_IO_BASE_UPPER        0x30
+#define PCI_CONFIG_IO_LIMIT_UPPER       0x32
+#define PCI_CONFIG_EXPANSION_ROM        0x38
+#define PCI_CONFIG_BRIDGE_CONTROL       0x3E
+
+#define PCI_INTERRUPT_LINE_DISABLED 0xff
+
+typedef struct pci_device pci_device;
+
+typedef uint8_t (*pci_driver_use)(const pci_device *);
+
+typedef uint8_t (*pci_driver_validate)(const pci_device *);
+
+typedef uint8_t (*pci_driver_initialize)(pci_device *);
+
+struct pci_driver {
+    const char *name;
+    const char *description;
+    struct {
+        uint8_t class;
+        uint8_t subclass;
+        uint8_t interface;
+        uint16_t vendor;
+        uint16_t device;
+    } match;
+    struct {
+        bool class: 1;
+        bool subclass: 1;
+        bool interface: 1;
+        bool vendor: 1;
+        bool device: 1;
+    } mask;
+    struct {
+        bool direct_use: 1;
+        bool validatable: 1;
+        bool initialisable: 1;
+    };
+    pci_driver_use use;
+    pci_driver_validate validate;
+    pci_driver_initialize initialize;
+} __attribute__((__aligned__(STRUCT_ALIGNMENT)));
+
+#define PCI_DRIVER(order) GENERIC_DRIVER(pci_driver, order)
+
+typedef struct {
+    uint32_t address;
+    uint32_t size;
+    uint8_t present: 1;
+    uint8_t is_io_space: 1;
+    uint8_t type: 2;
+    uint8_t prefetchable: 1;
+} bar_info;
+
+typedef struct pci_device {
+    uint8_t bus;
+    uint8_t slot;
+    uint8_t func;
+    union {
+        struct {
+            uint16_t vendorId;
+            uint16_t deviceId;
+        };
+        uint32_t config_line_0;
+    };
+    union {
+        struct {
+            uint8_t revisionId;
+            uint8_t programInterface;
+            uint8_t subclass;
+            uint8_t class;
+        };
+        uint32_t config_line_2;
+    };
+    union {
+        struct {
+            uint8_t cacheLineSize;
+            uint8_t latencyTimer;
+            uint8_t headerType;
+            uint8_t bist;
+        };
+        uint32_t config_line_3;
+    };
+    bar_info bar0;
+    bar_info bar1;
+    bar_info bar2;
+    bar_info bar3;
+    bar_info bar4;
+    bar_info bar5;
+    const struct pci_driver *pci_driver;
+    struct {
+        uint8_t present: 1;
+    } device_state;
+    struct {
+        uint8_t initialized: 1;
+    } driver_state;
+} pci_device;
+
+typedef union {
+    uint16_t value;
+    struct {
+        bool io_space: 1;
+        bool mem_space: 1;
+        bool bus_master: 1;
+        bool special_cycles: 1;
+        bool mem_write_invalidate_enable: 1;
+        bool vga_palette_snoop: 1;
+        bool parity_error_response: 1;
+        uint8_t reserved: 1;
+        bool serr_enable: 1;
+        bool fast_b2b_enable: 1;
+        bool interrupt_disable: 1;
+        uint8_t reserved2: 5;
+    } packed command;
+} pci_command_register_t;
+
+typedef union {
+    uint16_t value;
+    struct {
+        uint8_t reserved: 3;
+        bool interrupt_status: 1;
+        bool capabilities_list: 1;
+        bool speed_66mhz_capable: 1;
+        uint8_t reserved2: 1;
+        bool fast_b2b_capable: 1;
+        bool master_data_parity_error: 1;
+        uint8_t devsel_timing: 2;
+        bool signaled_target_abort: 1;
+        bool received_target_abort: 1;
+        bool received_master_abort: 1;
+        bool signaled_system_error: 1;
+        bool detected_parity_error: 1;
+    } packed status;
+} pci_status_register_t;
+
+void pci_print_info();
+
+void pci_dump_caps();
+
+#ifdef ENABLE_PCIPP
+
+void pci_pretty_print();
+
+#endif
+
+void pci_init_drivers();
+
+void pci_scan();
+
+uint32_t pci_config_read_double_word(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset);
+
+uint16_t pci_config_read_word(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset);
+
+uint8_t pci_config_read_byte(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset);
+
+void pci_config_write_double_word(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint32_t value);
+
+void pci_config_write_word(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint16_t value);
+
+void pci_config_write_byte(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint8_t value);
+
+void pci_init_bar(pci_device *device, uint8_t bar_index);
+
+#endif //NEW_KERNEL_PCI_H

include/myke/drivers/pci_devices.h

@@ -0,0 +1,296 @@
+//
+// Created by rick on 06-03-21.
+//
+#ifndef NEW_KERNEL_PCI_DEVICES_H
+#define NEW_KERNEL_PCI_DEVICES_H
+
+#include <sys/types.h>
+
+typedef struct pci_device_info_t {
+    uint8_t code;
+    char *name;
+    struct pci_device_info_t *sub;
+} pci_device_info;
+
+// build from https://wiki.osdev.org/PCI#Class_Codes
+
+pci_device_info info_unclassified[] = {
+        {0x00, "Non VGA Compatible", NULL},
+        {0x01, "VGA Compatible",     NULL},
+        {0, NULL,                    NULL},
+};
+
+pci_device_info info_mass_storage_ide[] = {
+        {0x00, "ISA comp only",                                NULL},
+        {0x05, "PCI native only",                              NULL},
+        {0x0A, "ISA compatibility controller, 2C, PCI native", NULL},
+        {0x0F, "PCI native controller, 2C, ISA comp",          NULL},
+        {0x80, "ISA comp only, BM",                            NULL},
+        {0x85, "PCI native only, BM",                          NULL},
+        {0x8A, "ISA Comp only, 2C, BM, PCI native",            NULL},
+        {0x8F, "PCI native, 2C, BM, ISA comp",                 NULL},
+        {0, NULL,                                              NULL},
+};
+
+pci_device_info info_mass_storage_ata[] = {
+        {0x20, "Single DMA",  NULL},
+        {0x30, "Chained DMA", NULL},
+        {0, NULL,             NULL},
+};
+
+pci_device_info info_mass_storage_sata[] = {
+        {0x00, "Vendor specific",    NULL},
+        {0x01, "AHCI 1.0",           NULL},
+        {0x02, "Serial Storage Bus", NULL},
+        {0, NULL,                    NULL},
+};
+
+pci_device_info info_mass_storage_sas[] = {
+        {0x00, "SAS",                NULL},
+        {0x01, "Serial Storage Bus", NULL},
+        {0, NULL,                    NULL},
+};
+
+pci_device_info info_mass_storage_nvm[] = {
+        {0x01, "NVMHCI",      NULL},
+        {0x02, "NVM Express", NULL},
+        {0, NULL,             NULL},
+};
+
+pci_device_info info_mass_storage[] = {
+        {0x00, "SCSI Bus Controller",    NULL},
+        {0x01, "IDE Controller",       info_mass_storage_ide},
+        {0x02, "Floppy Disk Controller", NULL},
+        {0x03, "IPI Bus Controller",     NULL},
+        {0x04, "RAID Controller",        NULL},
+        {0x05, "ATA Controller",       info_mass_storage_ata},
+        {0x06, "Serial ATA",           info_mass_storage_sata},
+        {0x07, "Serial Attached SCSI", info_mass_storage_sas},
+        {0x08, "NVM Controller",       info_mass_storage_nvm},
+        {0x80, "Other",                  NULL},
+        {0, NULL,                        NULL},
+};
+
+pci_device_info info_network_controller[] = {
+        {0x00, "Ethernet",                   NULL},
+        {0x01, "Token Ring",                 NULL},
+        {0x02, "FDDI",                       NULL},
+        {0x03, "ATM",                        NULL},
+        {0x04, "ISDN",                       NULL},
+        {0x05, "WordFip",                    NULL},
+        {0x06, "FICMG 2.14 Multi Computing", NULL},
+        {0x07, "Infiniband",                 NULL},
+        {0x08, "Fabric",                     NULL},
+        {0x80, "Other",                      NULL},
+        {0, NULL,                            NULL},
+};
+
+pci_device_info info_display_vga_comp[] = {
+        {0x00, "VGA",  NULL},
+        {0x01, "8514", NULL},
+        {0, NULL, 0},
+};
+
+pci_device_info info_display_controller[] = {
+        {0x00, "VGA Compatible", info_display_vga_comp},
+        {0x01, "XGA",   NULL},
+        {0x02, "3D",    NULL},
+        {0x80, "Other", NULL},
+        {0, NULL,       NULL},
+};
+
+pci_device_info info_multimedia_controller[] = {
+        {0x00, "Video",              NULL},
+        {0x01, "Audio",              NULL},
+        {0x02, "Computer Telephony", NULL},
+        {0x03, "Audio",              NULL},
+        {0x80, "Other",              NULL},
+        {0, NULL,                    NULL},
+};
+
+pci_device_info info_memory_controller[] = {
+        {0x00, "RAM",   NULL},
+        {0x01, "Flash", NULL},
+        {0x80, "Other", NULL},
+        {0, NULL,       NULL},
+};
+
+pci_device_info info_bridge_pci4[] = {
+        {0x00, "Normal",      NULL},
+        {0x01, "Subtractive", NULL},
+        {0, NULL,             NULL},
+};
+
+pci_device_info info_bridge_raceway[] = {
+        {0x00, "Transparent", NULL},
+        {0x01, "Endpoint",    NULL},
+        {0, NULL,             NULL},
+};
+
+pci_device_info info_bridge_pci9[] = {
+        {0x40, "Semi-transparent, primary",   NULL},
+        {0x80, "Semi-transparent, secondary", NULL},
+        {0, NULL,                             NULL},
+};
+
+pci_device_info info_bridge_device[] = {
+        {0x00, "Host",               NULL},
+        {0x01, "ISA",                NULL},
+        {0x02, "EISA",               NULL},
+        {0x03, "MCA",                NULL},
+        {0x04, "PCI-to-PCI4", info_bridge_pci4},
+        {0x05, "PMCIA",              NULL},
+        {0x06, "NuBus",              NULL},
+        {0x07, "CardBus",            NULL},
+        {0x08, "RACEway",     info_bridge_raceway},
+        {0x09, "PCI-to-PCI9", info_bridge_pci9},
+        {0x0A, "Infiniband-to-host", NULL},
+        {0x80, "Other",              NULL},
+        {0, NULL,                    NULL},
+};
+
+pci_device_info info_simple_comm[] = {
+        {0x00, "Serial",            NULL}, // todo sub
+        {0x01, "Parallel",          NULL}, // todo sub
+        {0x02, "Multiport serial",  NULL},
+        {0x03, "Modem",             NULL}, // todo sub
+        {0x04, "IEEE 488.1/2 GPIB", NULL},
+        {0x05, "Smart card",        NULL},
+        {0x80, "Other",             NULL},
+        {0, NULL,                   NULL},
+};
+
+pci_device_info info_base_system_peripheral[] = {
+        {0x00, "PIC",          NULL}, // todo sub
+        {0x01, "DMA",          NULL}, // todo sub
+        {0x02, "Timer",        NULL}, // todo sub
+        {0x03, "RTC",          NULL}, // todo sub
+        {0x04, "PCI Hot Plug", NULL},
+        {0x05, "SD",           NULL},
+        {0x06, "IOMMU",        NULL},
+        {0x80, "Other",        NULL},
+        {0, NULL,              NULL},
+};
+
+pci_device_info info_input_device[] = {
+        {0x00, "Keyboard",      NULL},
+        {0x01, "Digitizer pen", NULL},
+        {0x02, "Mouse",         NULL},
+        {0x03, "Scanner",       NULL},
+        {0x04, "Game Port",     NULL}, // todo sub
+        {0x80, "Other",         NULL},
+        {0, NULL,               NULL},
+};
+
+pci_device_info info_docking_station[] = {
+        {0x00, "Generic", NULL},
+        {0x80, "Other",   NULL},
+        {0, NULL,         NULL},
+};
+
+pci_device_info info_processor[] = {
+        {0x00, "386",          NULL},
+        {0x01, "486",          NULL},
+        {0x02, "Pentium",      NULL},
+        {0x03, "Pentium Pro",  NULL},
+        {0x10, "Alpha",        NULL},
+        {0x20, "PowerPC",      NULL},
+        {0x30, "MIPS",         NULL},
+        {0x40, "Co-Processor", NULL},
+        {0x80, "Other",        NULL},
+        {0, NULL,              NULL},
+};
+
+pci_device_info info_serial_bus_usb[] = {
+        {0x00, "UHCI (1.0)",  NULL},
+        {0x10, "OHCI (1.1)",  NULL},
+        {0x20, "EHCI (2.0)",  NULL},
+        {0x30, "XHCI (3.0)",  NULL},
+        {0x80, "Unspecified", NULL},
+        {0xFE, "Device",      NULL},
+        {0, NULL,             NULL},
+};
+
+pci_device_info info_serial_bus[] = {
+        {0x00, "FireWire",       NULL}, // todo sub
+        {0x01, "ACCESS bus",     NULL},
+        {0x02, "SSA",            NULL},
+        {0x03, "USB", info_serial_bus_usb},
+        {0x04, "Fibre Channel",  NULL},
+        {0x05, "SMBus",          NULL},
+        {0x06, "InfiniBand",     NULL},
+        {0x07, "IPMI Interface", NULL}, // todo sub
+        {0x08, "SERCOS",         NULL},
+        {0x09, "CanBus",         NULL},
+        {0x80, "Other",          NULL},
+        {0, NULL,                NULL},
+};
+
+pci_device_info info_wireless[] = {
+        {0x00, "IRDA Comp",       NULL},
+        {0x01, "Consumer IR",     NULL},
+        {0x10, "RF",              NULL},
+        {0x11, "Bluetooth",       NULL},
+        {0x12, "Broadband",       NULL},
+        {0x20, "Ethernet 802.1a", NULL},
+        {0x21, "Ethernet 802.1b", NULL},
+        {0x80, "Other",           NULL},
+        {0, NULL,                 NULL},
+};
+
+pci_device_info info_intelligent[] = {
+        {0x00, "I20", NULL},
+        {0, NULL,     NULL},
+};
+
+pci_device_info info_satellite[] = {
+        {0x01, "Satellite TV",    NULL},
+        {0x02, "Satellite Audio", NULL},
+        {0x03, "Satellite Voice", NULL},
+        {0x04, "Satellite Data",  NULL},
+        {0, NULL,                 NULL},
+};
+
+pci_device_info info_encryption[] = {
+        {0x00, "Network and Computing", NULL},
+        {0x10, "Entertainment",         NULL},
+        {0x80, "Other",                 NULL},
+        {0, NULL,                       NULL},
+};
+
+pci_device_info info_signal_processing[] = {
+        {0x00, "DPIO Modules",                 NULL},
+        {0x01, "Performance Counters",         NULL},
+        {0x10, "Communication Synchronizer",   NULL},
+        {0x20, "Signal Processing Management", NULL},
+        {0x80, "Other",                        NULL},
+        {0, NULL,                              NULL},
+};
+
+pci_device_info pci_root_info[] = {
+        {0x00, "Unclassified",           info_unclassified},
+        {0x01, "Mass Storage",           info_mass_storage},
+        {0x02, "Network",                info_network_controller},
+        {0x03, "Display",                info_display_controller},
+        {0x04, "Multimedia",             info_multimedia_controller},
+        {0x05, "Memory",                 info_memory_controller},
+        {0x06, "Bridge",                 info_bridge_device},
+        {0x07, "Simple Communication",   info_simple_comm},
+        {0x08, "Base System Peripheral", info_base_system_peripheral},
+        {0x09, "Input Device",           info_input_device},
+        {0x0a, "Docking",                info_docking_station},
+        {0x0b, "Processor",              info_processor},
+        {0x0c, "Serial Bus",             info_serial_bus},
+        {0x0d, "Wireless",               info_wireless},
+        {0x0e, "Intelligent",            info_intelligent},
+        {0x0f, "Satellite Comm",         info_satellite},
+        {0x10, "Encryption",             info_encryption},
+        {0x11, "Signal Processing",      info_signal_processing},
+        {0x12, "Processing Accelerator", NULL},
+        {0x13, "Non-Essential",          NULL},
+        {0x40, "Co-Processor",           NULL},
+        {0xFF, "Unassigned",             NULL},
+        {0, NULL,                        NULL},
+};
+
+#endif //NEW_KERNEL_PCI_DEVICES_H

include/myke/drivers/ports.h

@@ -0,0 +1,74 @@
+#ifndef MY_KERNEL_DRIVERS_PORT_H
+#define MY_KERNEL_DRIVERS_PORT_H
+
+#define PORT_PIC_MASTER_COMMAND 0x20
+#define PORT_PIC_MASTER_DATA 0x21
+#define PORT_PIC_SLAVE_COMMAND 0xA0
+#define PORT_PIC_SLAVE_DATA 0xA1
+
+// https://wiki.osdev.org/PIT
+#define PORT_PIT_COMMAND 0x43
+#define PORT_PIT_DATA_0 0x40
+#define PORT_PIT_DATA_1 0x41
+#define PORT_PIT_DATA_3 0x42
+
+// https://wiki.osdev.org/%228042%22_PS/2_Controller
+#define PORT_PS2_DATA 0x60
+#define PORT_PS2_STATUS 0x64
+#define PORT_PS2_COMMAND 0x64
+
+//http://www.osdever.net/FreeVGA/vga/crtcreg.htm#0A
+#define PORT_REG_SCREEN_CTRL 0x3d4
+#define PORT_REG_SCREEN_CTRL_CURSOR_H 0x0E
+#define PORT_REG_SCREEN_CTRL_CURSOR_L 0x0F
+#define PORT_REG_SCREEN_DATA 0x3d5
+
+// https://wiki.osdev.org/Serial_Ports
+#define PORT_SERIAL_0 0x3f8
+#define PORT_SERIAL_1 0x2f8
+#define PORT_SERIAL_2 0x3e8
+#define PORT_SERIAL_3 0x2e8
+
+#define PORT_SERIAL_DATA 0
+#define PORT_SERIAL_INTERRUPT 1
+#define PORT_SERIAL_DLAB_LSB 0
+#define PORT_SERIAL_DLAB_MSB 1
+#define PORT_SERIAL_INTERRUPT_ID_FIFO 2
+#define PORT_SERIAL_LINE_CONTROL 3
+#define PORT_SERIAL_MODEM_CONTROL 4
+#define PORT_SERIAL_LINE_STATUS 5
+#define PORT_SERIAL_MODEM_STATUS 6
+#define PORT_SERIAL_SCRATCH 6
+
+#define PORT_ACPI 0xB004
+#define PORT_ACPI_SHUTDOWN 0x2000
+
+#define PORT_QEMU_COMMAND 0x604
+#define PORT_QEMU_COMMAND_SHUTDOWN 0x2000
+
+#define PORT_VBOX 0x4004
+#define PORT_VBOX_SHUTDOWN 0x3400
+
+// https://wiki.osdev.org/PCI
+#define PORT_PCI_CONFIG_ADDRESS (0xCF8)
+#define PORT_PCI_CONFIG_DATA (0xCFC)
+
+unsigned char port_byte_in(unsigned short port);
+
+void port_byte_out(unsigned short port, unsigned char data);
+
+unsigned short port_word_in(unsigned short port);
+
+void port_word_out(unsigned short port, unsigned short data);
+
+unsigned int port_double_word_in(unsigned int port);
+
+void port_double_word_out(unsigned short port, unsigned int data);
+
+void port_word_out_repeat(unsigned short port, unsigned short *data, int buffer_size);
+
+void port_word_in_repeat(unsigned short port, unsigned short *data, int buffer_size);
+
+void port_double_word_in_repeat(unsigned short port, unsigned int *data, int buffer_size);
+
+#endif

include/myke/drivers/serial.h

@@ -0,0 +1,12 @@
+//
+// Created by rick on 28-01-21.
+//
+
+#ifndef NEW_KERNEL_SERIAL_H
+#define NEW_KERNEL_SERIAL_H
+
+int serial_init();
+
+void serial_kprint(const char *msg);
+
+#endif //NEW_KERNEL_SERIAL_H

include/myke/drivers/vgascreen.h

@@ -0,0 +1,34 @@
+//
+// Created by rick on 8/18/19.
+//
+
+#ifndef MY_KERNEL_DRIVERS_VGASCREEN_H
+#define MY_KERNEL_DRIVERS_VGASCREEN_H
+#define VGA_CHARACTER_MEMORY_LOCATION 0xb8000
+
+#define VGA_BLACK 0x0
+#define VGA_BLUE 0x1
+#define VGA_GREEN 0x2
+#define VGA_CIAN 0x3
+#define VGA_RED 0x4
+#define VGA_PURPLE 0x5
+#define VGA_ORANGE 0x6
+#define VGA_GRAY 0x7
+#define VGA_DARK_GRAY 0x8
+#define VGA_LIGHT_BLUE 0x9
+#define VGA_LIGHT_GREEN 0xA
+#define VGA_LIGHT_RED 0xB
+#define VGA_PINK 0xD
+#define VGA_YELLOW 0xE
+#define VGA_WHITE 0xF
+#define VGA_SHIFT_BG 4
+#define VGA_BLINK 0x80
+
+#define VGA_COL_MAX 80
+#define VGA_ROW_MAX 25
+
+void vga_clear_screen();
+
+void vga_kprint(const char *msg);
+
+#endif //MY_KERNEL_VGASCREEN_H

include/myke/elf.h

@@ -0,0 +1,73 @@
+//
+// Created by rick on 07-03-21.
+//
+
+#ifndef NEW_KERNEL_ELF_H
+#define NEW_KERNEL_ELF_H
+
+#include <sys/types.h>
+#include <myke/attributes.h>
+
+#define SHT_NULL        0
+#define SHT_PROGBITS    1
+#define SHT_SYMTAB      2
+#define SHT_STRTAB      3
+#define SHT_RELA        4
+#define SHT_HASH        5
+#define SHT_DYNAMIC     6
+#define SHT_NOTE        7
+#define SHT_NOBITS      8
+#define SHT_REL         9
+#define SHT_SHLIB       10
+#define SHT_DYNSYM      11
+#define SHT_LOPROC      0x70000000
+#define SHT_HIPROC      0x7fffffff
+#define SHT_LOUSER      0x80000000
+#define SHT_HIUSER      0xffffffff
+
+#define SHF_WRITE       0x1
+#define SHF_ALLOC       0x2
+#define SHF_EXECINSTR   0x4
+#define SHF_MASKPROC    0xf0000000
+
+#define ELF32_ST_BIND(i)   ((i)>>4)
+#define ELF32_ST_TYPE(i)   ((i)&0xf)
+#define ELF32_ST_INFO(b, t) (((b)<<4)+((t)&0xf))
+
+#define STB_LOCAL   0
+#define STB_GLOBAL  1
+#define STB_WEAK    2
+#define STB_LOPROC  13
+#define STB_HIPROC  15
+
+#define STT_NOTYPE  0
+#define STT_OBJECT  1
+#define STT_FUNC    2
+#define STT_SECTION 3
+#define STT_FILE    4
+#define STT_LOPROC  13
+#define STT_HIPROC  15
+
+struct elf32_section_header {
+    uint32_t sh_name;
+    uint32_t sh_type;
+    uint32_t sh_flags;
+    uint32_t sh_addr;
+    uint32_t sh_offset;
+    uint32_t sh_size;
+    uint32_t sh_link;
+    uint32_t sh_info;
+    uint32_t sh_addr_align;
+    uint32_t sh_ent_size;
+} packed;
+
+struct elf32_symtab_entry {
+    uint32_t st_name;
+    uint32_t st_value;
+    uint32_t st_size;
+    uint8_t st_info;
+    uint8_t st_other;
+    uint16_t st_shndx;
+};
+
+#endif //NEW_KERNEL_ELF_H

include/myke/fs/blockdev.h

@@ -0,0 +1,71 @@
+//
+// Created by rick on 06-02-21.
+//
+
+#ifndef NEW_KERNEL_BLOCKDEV_H
+#define NEW_KERNEL_BLOCKDEV_H
+
+#include <sys/types.h>
+#include <myke/driver.h>
+
+#define BLOCK_DEV_ACCESS_OK  0
+#define BLOCK_DEV_ACCESS_ERR 1
+
+#define BLOCK_DEV_DIRECTION_READ    0
+#define BLOCK_DEV_DIRECTION_WRITE   1
+
+#define BLOCK_DEV_DRIVER_CHECK_OK       0
+#define BLOCK_DEV_DRIVER_CHECK_NO_MATCH 1
+
+#define BLOCK_DEV_REGISTER_DRIVER_OK 0
+#define BLOCK_DEV_REGISTER_DRIVER_FULL 1
+
+#define BLOCK_DEV_REGISTER_OK 0
+#define BLOCK_DEV_REGISTER_FULL 1
+
+
+typedef struct block_device block_device;
+
+typedef uint8_t (*block_device_driver_check_device)(const block_device *device, uint8_t *first_sector);
+
+typedef uint8_t (*block_device_driver_free)(const block_device *device);
+
+typedef uint8_t (*block_device_access)(const block_device *device, uint8_t direction, uint32_t lba, uint8_t sectors, void *target);
+
+struct block_dev_driver {
+    char name[16];
+    struct {
+        uint8_t root_only: 1;
+    } flags;
+    block_device_driver_check_device check_device;
+    block_device_driver_free free_device;
+} __attribute__((__aligned__(STRUCT_ALIGNMENT)));
+
+#define BLOCK_DEV_DRIVER(order) GENERIC_DRIVER(block_dev_driver, order)
+
+typedef struct block_device {
+    struct {
+        uint8_t present: 1;
+        uint8_t scanned: 1;
+        uint8_t unreadable: 1;
+        uint8_t root_device: 1;
+        uint8_t driver_installed: 1;
+    } flags;
+    char identifier[16];
+    uint32_t num_lba;
+    uint16_t block_size;
+    block_device_access access;
+    struct block_dev_driver *driver;
+    void *device_info; // pointer to driver defined structure
+    // todo device info
+} block_device;
+
+uint8_t block_dev_register(block_device *device);
+
+void block_dev_free(block_device *device);
+
+void block_dev_start_task();
+
+void block_dev_print_info();
+
+#endif //NEW_KERNEL_BLOCKDEV_H

include/myke/fs/mbr.h

@@ -0,0 +1,12 @@
+//
+// Created by rick on 06-02-21.
+//
+
+#ifndef NEW_KERNEL_MBR_H
+#define NEW_KERNEL_MBR_H
+
+#include <sys/types.h>
+
+void mbr_read_from_ide(uint8_t ide_drive);
+
+#endif //NEW_KERNEL_MBR_H

include/myke/libc/ringqueue.h

@@ -0,0 +1,19 @@
+//
+// Created by rick on 30-01-21.
+//
+
+#ifndef NEW_KERNEL_RINGQUEUE_H
+#define NEW_KERNEL_RINGQUEUE_H
+
+#include <sys/types.h>
+#include <stdbool.h>
+
+void *create_buffer(int count, int object_size);
+
+void free_buffer(void *buffer);
+
+void ring_buffer_put(void *buffer, void *item);
+
+bool ring_buffer_get(void *buffer, void *target);
+
+#endif //NEW_KERNEL_RINGQUEUE_H

include/myke/libk/kprint.h

@@ -0,0 +1,22 @@
+//
+// Created by rick on 28-01-21.
+//
+
+#ifndef NEW_KERNEL_KPRINT_H
+#define NEW_KERNEL_KPRINT_H
+
+#endif //NEW_KERNEL_KPRINT_H
+
+#include <sys/types.h>
+
+typedef void (*kprint_handler)(const char *);
+
+void kprint_register(kprint_handler);
+
+void kprint(const char *msg);
+
+void kprint_sync(const char* msg);
+
+void kprint_init();
+
+void kprint_start_task();

include/myke/libk/libk.h

@@ -0,0 +1,23 @@
+//
+// Created by rick on 02-02-21.
+//
+
+#ifndef NEW_KERNEL_LIBK_H
+#define NEW_KERNEL_LIBK_H
+#include <myke/attributes.h>
+#include <stdbool.h>
+
+extern void* _kernel_start;
+extern void* _kernel_end;
+#define kernel_start ((uint32_t)(&_kernel_start))
+#define kernel_end ((uint32_t)(&_kernel_end))
+
+bool k_addr_in_kspace(void *addr);
+
+void k_wait_for_interrupt();
+
+void noreturn k_panics(const char *msg);
+
+void noreturn k_panic();
+
+#endif //NEW_KERNEL_LIBK_H

include/myke/libk/syscall.h

@@ -0,0 +1,23 @@
+//
+// Created by rick on 22-02-21.
+//
+
+#ifndef NEW_KERNEL_SYSCALL_H
+#define NEW_KERNEL_SYSCALL_H
+#include <sys/types.h>
+#include <myke/attributes.h>
+
+#define SYSCALL_START_SCHEDULER 0x01
+#define SYSCALL_YIELD_JOB       0x02
+#define SYSCALL_YIELD_IRQ       0x03
+#define SYSCALL_SUSPEND         0x04
+
+void noreturn syscall_start_scheduler();
+
+void syscall_yield_job();
+
+void syscall_yield_irq(uint16_t irq);
+
+void syscall_job_suspend();
+
+#endif //NEW_KERNEL_SYSCALL_H

include/myke/mem/malloc.h

@@ -0,0 +1,22 @@
+//
+// Created by rick on 23-02-21.
+//
+
+#ifndef NEW_KERNEL_MALLOC_H
+#define NEW_KERNEL_MALLOC_H
+// retrieved from https://github.com/blanham/liballoc
+#include <sys/types.h>
+
+void *malloc(size_t);
+
+void *realloc(void *, size_t);
+
+void *calloc(size_t, size_t);
+
+void free(void *);
+
+#ifndef INCLUDE_STDLIB
+void print_malloc_info();
+#endif
+
+#endif //NEW_KERNEL_MALLOC_H

include/myke/mem/mem.h

@@ -0,0 +1,14 @@
+//
+// Created by rick on 22-04-20.
+//
+
+#ifndef NEW_KERNEL_MEM_H
+#define NEW_KERNEL_MEM_H
+
+#include <multiboot.h>
+
+void mmap_init_multiboot(struct multiboot_mmap_entry *entries, uint32_t count);
+
+void print_mmap_info();
+
+#endif //NEW_KERNEL_MEM_H

include/myke/mem/paging.h

@@ -0,0 +1,8 @@
+//
+// Created by rick on 21-02-21.
+//
+
+#ifndef NEW_KERNEL_PAGING_H
+#define NEW_KERNEL_PAGING_H
+
+#endif //NEW_KERNEL_PAGING_H

include/myke/mem/pmm.h

@@ -0,0 +1,16 @@
+//
+// Created by rick on 23-02-21.
+//
+
+#ifndef NEW_KERNEL_PMM_H
+#define NEW_KERNEL_PMM_H
+#include <sys/types.h>
+
+// 4k blocks
+#define PAGE_SIZE 4096
+
+void pmm_init(void* start_addr, size_t size);
+void *pmm_get_pages(uint32_t num_pages);
+void pmm_free_pages(void* page, uint32_t num_pages);
+
+#endif //NEW_KERNEL_PMM_H

include/myke/tasks/locking.h

@@ -0,0 +1,40 @@
+//
+// Created by rick on 27-02-21.
+//
+
+#ifndef NEW_KERNEL_LOCKING_H
+#define NEW_KERNEL_LOCKING_H
+
+#include <sys/types.h>
+
+typedef struct semaphore semaphore_t;
+
+typedef struct mutex mutex_t;
+
+typedef struct spinlock spinlock_t;
+
+semaphore_t *semaphore_create(int32_t start);
+
+void semaphore_wait(semaphore_t *semaphore);
+
+void semaphore_signal(semaphore_t *semaphore);
+
+void semaphore_free(semaphore_t *semaphore);
+
+mutex_t *mutex_create();
+
+void mutex_acquire(mutex_t *mutex);
+
+void mutex_release(mutex_t *mutex);
+
+void mutex_free(mutex_t *mutex);
+
+spinlock_t *spinlock_create();
+
+void spinlock_acquire(spinlock_t *spinlock);
+
+void spinlock_release(spinlock_t *spinlock);
+
+void spinlock_free(spinlock_t *spinlock);
+
+#endif //NEW_KERNEL_LOCKING_H

include/myke/tasks/task.h

@@ -0,0 +1,38 @@
+//
+// Created by rick on 22-02-21.
+//
+
+#ifndef NEW_KERNEL_TASK_H
+#define NEW_KERNEL_TASK_H
+
+#include <myke/cpu/cpu.h>
+
+typedef void (*task_entrypoint)(void *entry_data);
+
+void task_notify_irq(uint8_t irq_no);
+
+void task_wait_irq(uint16_t irq_bits);
+
+void task_init();
+
+void task_start_first();
+
+void task_switch_next();
+
+uint32_t task_spawn(task_entrypoint, void *entry_data);
+
+void task_end(uint32_t tid);
+
+void task_suspend();
+
+uint32_t task_get_current_tid();
+
+void task_signal(uint32_t tid);
+
+void task_lock_acquire();
+
+void task_ensure_enabled();
+
+void task_lock_free();
+
+#endif //NEW_KERNEL_TASK_H

include/myke/util/power.h

@@ -0,0 +1,11 @@
+//
+// Created by rick on 03-03-21.
+//
+
+#ifndef NEW_KERNEL_POWER_H
+#define NEW_KERNEL_POWER_H
+#include <myke/attributes.h>
+
+void noreturn power_shutdown();
+
+#endif //NEW_KERNEL_POWER_H

include/myke/util/stream.h

@@ -0,0 +1,26 @@
+//
+// Created by rick on 02-03-21.
+//
+
+#ifndef NEW_KERNEL_STREAM_H
+#define NEW_KERNEL_STREAM_H
+
+#include <stdint.h>
+
+typedef struct stream stream_t;
+
+stream_t *stream_create(uint32_t size);
+
+void stream_free(stream_t *strm);
+
+void stream_wait(stream_t *stream);
+
+uint32_t stream_read(stream_t *strm, uint8_t *target, uint32_t count);
+
+uint32_t stream_write(stream_t *strm, const uint8_t *source, uint32_t count);
+
+uint32_t stream_get_write_available(stream_t *stream);
+
+uint32_t stream_get_read_available(stream_t *stream);
+
+#endif //NEW_KERNEL_STREAM_H