400 lines
14 KiB
C
400 lines
14 KiB
C
//
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// Created by rick on 02-02-21.
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//
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// https://wiki.osdev.org/PCI
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#include "pci.h"
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#include <types.h>
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#include <drivers/ports.h>
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#include <libk/libk.h>
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#include <libc/kprintf.h>
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#ifdef ENABLE_PCIPP
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#include <drivers/pci_devices.h>
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#include <libc/sort.h>
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#endif
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#define PCI_CONFIG_ENABLE (1 << 31)
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#define PCI_CONFIG_SHIFT_BUS_NUMBER 16
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#define PCI_CONFIG_SHIFT_DEV_NUMBER 11
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#define PCI_CONFIG_SHIFT_FUNC_NUMBER 8
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#define PCI_CONFIG_LINE_0 0x00
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#define PCI_CONFIG_LINE_1 0x01
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#define PCI_CONFIG_LINE_2 0x08
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#define PCI_CONFIG_LINE_3 0x0C
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#define MAX_PCI_DRIVERS 64
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#define MAX_PCI_DEVICES 64
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#define MASK_BAR_IOSPACE 0xFFFFFFFC
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#define MASK_BAR_MEMSPACE 0xFFFFFFF0
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//const pci_driver *pci_drivers[MAX_PCI_DRIVERS];
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extern struct pci_driver __start_pci_driver[];
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extern struct pci_driver __stop_pci_driver[];
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#define NUM_DRIVERS ((size_t)(__stop_pci_driver - __start_pci_driver))
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#define DRIVER(i) ((__start_pci_driver) + (i))
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int last_pci_device_index = 0;
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pci_device pci_devices[MAX_PCI_DEVICES];
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void pci_check_bus(uint8_t bus);
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uint8_t used pci_secondary_bus_use(const pci_device *device) {
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uint8_t secondary_bus = pci_config_read_byte(device->bus, device->slot, device->func,
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PCI_CONFIG_SECONDARY_BUS_NUMBER);
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pci_check_bus(secondary_bus);
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return PCI_USE_OK;
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}
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uint32_t pci_config_address(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) {
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return PCI_CONFIG_ENABLE
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| ((uint32_t) bus << PCI_CONFIG_SHIFT_BUS_NUMBER)
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| ((uint32_t) slot << PCI_CONFIG_SHIFT_DEV_NUMBER)
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| ((uint32_t) func << PCI_CONFIG_SHIFT_FUNC_NUMBER)
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| (offset & 0xFC);
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}
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uint32_t pci_config_read_double_word(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) {
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uint32_t address = pci_config_address(bus, slot, func, offset);
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port_double_word_out(PORT_PCI_CONFIG_ADDRESS, address);
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return port_double_word_in(PORT_PCI_CONFIG_DATA);
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}
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uint16_t pci_config_read_word(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) {
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uint32_t address = pci_config_address(bus, slot, func, offset);
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port_double_word_out(PORT_PCI_CONFIG_ADDRESS, address);
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return port_double_word_in(PORT_PCI_CONFIG_DATA) >> ((offset & 2) * 8) & 0xFFFF;
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}
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uint8_t pci_config_read_byte(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) {
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uint32_t address = pci_config_address(bus, slot, func, offset);
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port_double_word_out(PORT_PCI_CONFIG_ADDRESS, address);
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return port_double_word_in(PORT_PCI_CONFIG_DATA) >> ((offset & 0b11) * 8) & 0xFF;
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}
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void pci_config_write_double_word(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint32_t value) {
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uint32_t address = pci_config_address(bus, slot, func, offset);
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port_double_word_out(PORT_PCI_CONFIG_ADDRESS, address);
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port_double_word_out(PORT_PCI_CONFIG_DATA, value);
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}
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void pci_config_write_word(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint16_t value) {
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uint32_t address = pci_config_address(bus, slot, func, offset);
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port_double_word_out(PORT_PCI_CONFIG_ADDRESS, address);
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port_word_out(PORT_PCI_CONFIG_DATA, value);
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}
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void pci_config_write_byte(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint8_t value) {
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uint32_t address = pci_config_address(bus, slot, func, offset);
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port_double_word_out(PORT_PCI_CONFIG_ADDRESS, address);
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port_byte_out(PORT_PCI_CONFIG_DATA, value);
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}
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pci_command_register_t pci_get_config(pci_device *device) {
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pci_command_register_t status;
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status.value = pci_config_read_word(device->bus, device->slot, device->func, PCI_CONFIG_COMMAND);
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return status;
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}
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void pci_set_status(pci_device *device, pci_status_register_t status) {
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pci_config_write_word(device->bus, device->slot, device->func, PCI_CONFIG_STATUS, status.value);
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}
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pci_status_register_t pci_get_status(pci_device *device) {
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pci_status_register_t status;
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status.value = pci_config_read_word(device->bus, device->slot, device->func, PCI_CONFIG_STATUS);
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return status;
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}
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uint16_t pci_get_vendor_id(uint8_t bus, uint8_t slot, uint8_t func) {
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return pci_config_read_word(bus, slot, func, PCI_CONFIG_VENDOR_ID);
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}
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uint8_t pci_get_header_type(uint8_t bus, uint8_t slot, uint8_t func) {
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return pci_config_read_byte(bus, slot, func, PCI_CONFIG_HEADER_TYPE);
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}
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void pci_pick_driver(pci_device *device) {
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for (size_t i = 0; i < NUM_DRIVERS; ++i) {
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struct pci_driver *driver = DRIVER(i);
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if (driver == NULL) {
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continue;
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}
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if (driver->mask.class && driver->match.class != device->class) {
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continue;
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}
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if (driver->mask.subclass && driver->match.subclass != device->subclass) {
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continue;
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}
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if (driver->mask.interface && driver->match.interface != device->programInterface) {
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continue;
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}
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if (driver->mask.vendor && driver->match.vendor != device->vendorId) {
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continue;
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}
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if (driver->mask.device && driver->match.device != device->deviceId) {
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continue;
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}
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if (driver->direct_use) {
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if (driver->use(device) != PCI_USE_OK) {
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continue;
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}
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} else if (driver->validatable) {
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if (driver->validate(device) != PCI_VALIDATE_OK) {
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continue;
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}
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} else {
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continue;
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}
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device->pci_driver = DRIVER(i);
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}
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}
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void pci_check_function(uint8_t bus, uint8_t slot, uint8_t func) {
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pci_devices[last_pci_device_index].bus = bus;
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pci_devices[last_pci_device_index].slot = slot;
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pci_devices[last_pci_device_index].func = func;
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pci_devices[last_pci_device_index].config_line_0 = pci_config_read_double_word(bus, slot, func, PCI_CONFIG_LINE_0);
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pci_devices[last_pci_device_index].config_line_2 = pci_config_read_double_word(bus, slot, func, PCI_CONFIG_LINE_2);
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pci_devices[last_pci_device_index].config_line_3 = pci_config_read_double_word(bus, slot, func, PCI_CONFIG_LINE_3);
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pci_devices[last_pci_device_index].device_state.present = 1;
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last_pci_device_index++;
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pci_pick_driver(&pci_devices[last_pci_device_index - 1]);
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// todo do something with the function
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}
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void pci_check_device(uint8_t bus, uint8_t device) {
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uint8_t function = 0;
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uint16_t vendor_id = pci_get_vendor_id(bus, device, function);
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if (vendor_id == 0xFFFF) return;
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pci_check_function(bus, device, function);
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uint8_t header_type = pci_get_header_type(bus, device, function);
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if (header_type & PCI_HEADER_TYPE_MULTI_FUNC) {
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for (function = 1; function < 8; ++function) {
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if (pci_get_vendor_id(bus, device, function) != 0xFFFF) {
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pci_check_function(bus, device, function);
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}
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}
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}
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}
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void pci_check_bus(uint8_t bus) {
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for (int device = 0; device < 32; ++device) {
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pci_check_device(bus, device);
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}
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}
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int pci_driver_compare(const void* a, const void* b) {
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int rank_a = ((struct pci_driver *) a)->rank;
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int rank_b = ((struct pci_driver *) b)->rank;
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if (rank_a > rank_b) {
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return 1;
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} else if (rank_a < rank_b) {
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return -1;
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}
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return 0;
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}
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void pci_sort_drivers() {
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qsort(DRIVER(0), NUM_DRIVERS, sizeof(struct pci_driver), pci_driver_compare);
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}
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void pci_scan() {
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if (last_pci_device_index != 0) {
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k_panics("Can only scan once!");
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}
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uint8_t header_type = pci_get_header_type(0, 0, 0);
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if (header_type & PCI_HEADER_TYPE_MULTI_FUNC) {
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// multiple pci host controllers
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for (int function = 0; function < 8; ++function) {
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pci_check_bus(function);
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}
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} else {
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pci_check_bus(0);
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}
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}
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void pci_init_drivers() {
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for (int device_index = 0; device_index < MAX_PCI_DEVICES; ++device_index) {
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if (!pci_devices[device_index].device_state.present) {
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continue;
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}
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if (pci_devices[device_index].driver_state.initialized) {
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continue; // already done
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}
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if (pci_devices[device_index].pci_driver == NULL) {
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continue; // no driver found
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}
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if (pci_devices[device_index].pci_driver->initialisable) {
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pci_devices[device_index].pci_driver->initialize(&pci_devices[device_index]);
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}
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pci_devices[device_index].driver_state.initialized = 1;
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}
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}
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void pci_print_info() {
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for (int i = 0; i < last_pci_device_index; ++i) {
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printf("PCI BSF: %2x/%2x/%2x, CSI: %2x/%2x/%2x, V/D: %4x/%4x, driver: %s\n",
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pci_devices[i].bus, pci_devices[i].slot, pci_devices[i].func,
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pci_devices[i].class, pci_devices[i].subclass, pci_devices[i].programInterface,
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pci_devices[i].vendorId, pci_devices[i].deviceId,
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(pci_devices[i].pci_driver == NULL ? "none" : pci_devices[i].pci_driver->name));
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}
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}
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void pci_dump_caps_internal(pci_device *device) {
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if (pci_devices->headerType >= 0x02) {
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printf("\tNot supported for PCI-to-CardBus bridge\n");
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return;
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}
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if (!pci_get_status(device).status.capabilities_list) {
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printf("\tNo caps\n");
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return;
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}
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uint8_t cap_ptr = pci_config_read_byte(device->bus, device->slot, device->func, PCI_CONFIG_CAP_POINTER);
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printf("\t%x\n", cap_ptr);
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// todo traverse
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}
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void pci_dump_caps() {
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for (int i = 0; i < last_pci_device_index; ++i) {
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printf("PCI BSF: %2x/%2x/%2x, CSI: %2x/%2x/%2x, V/D: %4x/%4x, driver: %s\n",
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pci_devices[i].bus, pci_devices[i].slot, pci_devices[i].func,
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pci_devices[i].class, pci_devices[i].subclass, pci_devices[i].programInterface,
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pci_devices[i].vendorId, pci_devices[i].deviceId,
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(pci_devices[i].pci_driver == NULL ? "none" : pci_devices[i].pci_driver->name));
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pci_dump_caps_internal(&pci_devices[i]);
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}
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}
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#ifdef ENABLE_PCIPP
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void pci_pretty_print() {
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for (int i = 0; i < last_pci_device_index; ++i) {
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char *class = NULL;
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char *subclass = NULL;
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char *function = NULL;
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pci_device_info *class_info = NULL;
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pci_device_info *subclass_info = NULL;
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pci_device_info *function_info = NULL;
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pci_device_info *current = pci_root_info;
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while (current->name != NULL) {
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if (current->code == pci_devices[i].class) {
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class = current->name;
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class_info = current;
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break;
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}
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current = current + 1;
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}
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if (class_info != NULL && class_info->sub != NULL) {
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current = class_info->sub;
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while (current->name != NULL) {
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if (current->code == pci_devices[i].subclass) {
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subclass = current->name;
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subclass_info = current;
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break;
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}
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current = current + 1;
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}
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}
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if (subclass_info != NULL && subclass_info->sub != NULL) {
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current = subclass_info->sub;
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while (current->name != NULL) {
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if (current->code == pci_devices[i].programInterface) {
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function = current->name;
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function_info = current;
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break;
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}
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current = current + 1;
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}
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}
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printf("PCI BSF: %2x/%2x/%2x %s %s %s\n",
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pci_devices[i].bus, pci_devices[i].slot, pci_devices[i].func,
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class, subclass, function);
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}
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}
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#endif
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void pci_init_bar(pci_device *device, uint8_t bar_index) {
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if (device->headerType != 0x00) {
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k_panics("Only header 0x00 supported for now");
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return;
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}
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uint8_t offset = 0;
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bar_info *bar;
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switch (bar_index) {
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case 0:
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offset = PCI_CONFIG_BAR0;
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bar = &device->bar0;
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break;
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case 1:
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offset = PCI_CONFIG_BAR1;
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bar = &device->bar1;
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break;
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case 2:
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offset = PCI_CONFIG_BAR2;
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bar = &device->bar2;
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break;
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case 3:
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offset = PCI_CONFIG_BAR3;
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bar = &device->bar3;
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break;
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case 4:
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offset = PCI_CONFIG_BAR4;
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bar = &device->bar4;
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break;
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case 5:
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offset = PCI_CONFIG_BAR5;
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bar = &device->bar5;
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break;
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default:
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k_panics("Bar index too high");
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return;
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}
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uint32_t original_address = pci_config_read_double_word(device->bus, device->slot, device->func, offset);
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pci_config_write_double_word(device->bus, device->slot, device->func, offset, 0xFFFFFFFF);
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uint32_t masked_size = pci_config_read_double_word(device->bus, device->slot, device->func, offset);
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if (original_address & 0x1) {
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// IO Space
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bar->size = ~(masked_size & MASK_BAR_IOSPACE) + 1;
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bar->address = original_address & MASK_BAR_IOSPACE;
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bar->is_io_space = 1;
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} else {
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// Memory space
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bar->size = ~(masked_size & MASK_BAR_MEMSPACE) + 1;
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bar->address = original_address & 0xFFFFFFF0;
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bar->is_io_space = 0;
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bar->type = (original_address & 0b110) >> 1;
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bar->prefetchable = (original_address & 0b1000) >> 3;
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}
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// todo identify conflicts, move to different address
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pci_config_write_double_word(device->bus, device->slot, device->func, offset, original_address);
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bar->present = 1;
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}
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// internal drivers
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PCI_DRIVER(
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.name = "pci-secondary-bus",
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.description = "A PCI bus connected to the primary bus",
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.rank = 0, // internal driver for PCI bus
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.match.class = PCI_CLASS_BRIDGE,
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.match.subclass = PCI_SUB_CLASS_PCI_PCI_BRIDGE_4,
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.mask.class = true,
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.mask.subclass = true,
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.direct_use = true,
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.use = pci_secondary_bus_use,
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);
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// todo https://wiki.osdev.org/Universal_Serial_Bus if i dare
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