156 lines
3.8 KiB
C
156 lines
3.8 KiB
C
//
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// Created by rick on 02-02-21.
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//
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#ifndef NEW_KERNEL_PCI_H
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#define NEW_KERNEL_PCI_H
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#include <types.h>
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#define PCI_CLASS_MASS_STORAGE 0x01
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// class MASS STORAGE 1
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#define PCI_SUB_CLASS_IDE 0x01
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#define PCI_REGISTER_OK 0
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#define PCI_REGISTER_ERR_FULL (-1)
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#define PCI_VALIDATE_OK 0
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#define PCI_VALIDATE_FAIL 1
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#define PCI_INIT_OK 0
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#define PCI_INIT_FAIL 1
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#define PCI_HEADER_TYPE_MULTI_FUNC 0x80
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#define PCI_HEADER_TYPE_ENDPOINT 0x00
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#define PCI_HEADER_TYPE_PCI_PCI_BRIDGE 0x01
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#define PCI_HEADER_TYPE_PCI_CARDBUS_BRIDGE 0x02
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#define PCI_CONFIG_VENDOR_ID 0x00
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#define PCI_CONFIG_DEVICE_ID 0x02
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#define PCI_CONFIG_COMMAND 0x04
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#define PCI_CONFIG_STATUS 0x06
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#define PCI_CONFIG_REVISION_ID 0x08
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#define PCI_CONFIG_PROG_IF 0x09
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#define PCI_CONFIG_SUBCLASS 0x0A
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#define PCI_CONFIG_CLASS_CODE 0x0B
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#define PCI_CONFIG_CACHE_LINE_SIZE 0x0C
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#define PCI_CONFIG_LATENCY_TIMER 0x0D
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#define PCI_CONFIG_HEADER_TYPE 0x0E
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#define PCI_CONFIG_BIST 0x0F
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#define PCI_CONFIG_BAR0 0x10
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#define PCI_CONFIG_BAR1 0x14
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#define PCI_CONFIG_BAR2 0x18
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#define PCI_CONFIG_BAR3 0x1C
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#define PCI_CONFIG_BAR4 0x20
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#define PCI_CONFIG_BAR5 0x24
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#define PCI_CONFIG_CARDBUS_CIS_P 0x28
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#define PCI_CONFIG_SUBSYSTEM_VENDOR_ID 0x2C
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#define PCI_CONFIG_SUBSYSTEM_ID 0x2E
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#define PCI_CONFIG_EXPANSION_ROM_ADDR 0x30
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#define PCI_CONFIG_CAP_POINTER 0x34
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#define PCI_CONFIG_INTERRUPT_LINE 0x3C
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#define PCI_CONFIG_INTERRUPT_PIN 0x3D
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#define PCI_CONFIG_MAX_GRANT 0x3E
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#define PCI_CONFIG_MAX_LATENCY 0x3F
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#define PCI_INTERRUPT_LINE_DISABLED 0xff
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typedef struct pci_driver pci_driver;
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typedef struct pci_device pci_device;
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typedef u8 (*pci_driver_validate)(const pci_device *);
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typedef u8 (*pci_driver_initialize)(pci_device *);
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typedef struct pci_driver {
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const char *name;
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const char *description;
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u8 order;
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u8 pci_class;
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u8 pci_subclass;
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struct {
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u8 pci_use_subclass: 1;
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};
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pci_driver_validate validate;
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pci_driver_initialize initialize;
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} pci_driver;
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typedef struct {
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u32 address;
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u32 size;
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u8 present: 1;
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u8 is_io_space: 1;
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u8 type: 2;
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u8 prefetchable: 1;
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} bar_info;
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typedef struct pci_device {
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u8 bus;
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u8 slot;
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u8 func;
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union {
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struct {
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u16 vendorId;
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u16 deviceId;
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};
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u32 config_line_0;
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};
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union {
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struct {
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u8 revisionId;
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u8 programInterface;
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u8 subclass;
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u8 class;
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};
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u32 config_line_2;
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};
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union {
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struct {
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u8 cacheLineSize;
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u8 latencyTimer;
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u8 headerType;
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u8 bist;
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};
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u32 config_line_3;
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};
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bar_info bar0;
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bar_info bar1;
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bar_info bar2;
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bar_info bar3;
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bar_info bar4;
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bar_info bar5;
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const pci_driver *pci_driver;
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struct {
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u8 present: 1;
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} device_state;
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struct {
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u8 initialized: 1;
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} driver_state;
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} pci_device;
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void pci_print_info();
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u32 pci_register_driver(const pci_driver *pci_driver);
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void pci_sort_drivers();
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void pci_init_drivers();
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void pci_scan();
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u32 pci_config_read_double_word(u8 bus, u8 slot, u8 func, u8 offset);
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u16 pci_config_read_word(u8 bus, u8 slot, u8 func, u8 offset);
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u8 pci_config_read_byte(u8 bus, u8 slot, u8 func, u8 offset);
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void pci_config_write_double_word(u8 bus, u8 slot, u8 func, u8 offset, u32 value);
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void pci_config_write_word(u8 bus, u8 slot, u8 func, u8 offset, u16 value);
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void pci_config_write_byte(u8 bus, u8 slot, u8 func, u8 offset, u8 value);
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void pci_init_bar(pci_device *device, u8 bar_index);
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#endif //NEW_KERNEL_PCI_H
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