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feat: added cross compiler and moved headers to include dir

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This commit is contained in:
Rick Rongen
2021-03-09 19:45:20 +01:00
parent cefdb8ed90
commit dc4bf71b5a
77 changed files with 180 additions and 45 deletions
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4
kernel/drivers/ide.c
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@@ -3,9 +3,9 @@
//
// https://wiki.osdev.org/PCI_IDE_Controller
#include "ide.h"
#include <drivers/ide.h>
#include <debug/debug.h>
#include "ports.h"
#include <drivers/ports.h>
#include <types.h>
#include <libk/kprint.h>
#include <drivers/pci.h>

14
kernel/drivers/ide.h
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@@ -1,14 +0,0 @@
//
// Created by rick on 03-02-21.
//
#ifndef NEW_KERNEL_IDE_H
#define NEW_KERNEL_IDE_H
#include <types.h>
uint8_t ide_access(uint8_t direction, uint8_t drive, uint32_t lba, uint8_t numsects, void *target);
void ide_print_devices();
#endif //NEW_KERNEL_IDE_H

2
kernel/drivers/keyboard.c
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@@ -1,7 +1,7 @@
//
// Created by rick on 23-03-20.
//
#include "keyboard.h"
#include <drivers/keyboard.h>
#include <drivers/ports.h>
#include <cpu/isr.h>

30
kernel/drivers/keyboard.h
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@@ -1,30 +0,0 @@
//
// Created by rick on 23-03-20.
//
#ifndef MY_KERNEL_KEYBOARD_H
#define MY_KERNEL_KEYBOARD_H
#include <types.h>
typedef struct KeyEvent_t {
// KeyCode key;
uint32_t scancode;
char ascii_code;
uint8_t is_release: 1;
uint8_t shift: 1;
uint8_t alt: 1;
uint8_t ctrl: 1;
} KeyEvent;
char getc();
void init_keyboard();
//const char *key_code_to_string(KeyCode key);
KeyEvent *get_next_event();
void free_event(KeyEvent *event);
#endif //MY_KERNEL_KEYBOARD_H

2
kernel/drivers/pci.c
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@@ -3,7 +3,7 @@
//
// https://wiki.osdev.org/PCI
#include "pci.h"
#include <drivers/pci.h>
#include <types.h>
#include <drivers/ports.h>

243
kernel/drivers/pci.h
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@@ -1,243 +0,0 @@
//
// Created by rick on 02-02-21.
//
#ifndef NEW_KERNEL_PCI_H
#define NEW_KERNEL_PCI_H
#include <types.h>
#include <driver.h>
#include <stdbool.h>
#include <attributes.h>
#define PCI_CLASS_MASS_STORAGE 0x01
#define PCI_CLASS_BRIDGE 0x06
// class MASS STORAGE 0x01
#define PCI_SUB_CLASS_IDE 0x01
// class BRIDGE 0x06
#define PCI_SUB_CLASS_PCI_PCI_BRIDGE_4 0x04
#define PCI_SUB_CLASS_PCI_PCI_BRIDGE_9 0x09
#define PCI_REGISTER_OK 0
#define PCI_REGISTER_ERR_FULL (-1)
#define PCI_VALIDATE_OK 0
#define PCI_VALIDATE_FAIL 1
#define PCI_INIT_OK 0
#define PCI_INIT_FAIL 1
#define PCI_USE_OK 0
#define PCI_USE_FAIL 1
#define PCI_HEADER_TYPE_MULTI_FUNC 0x80
#define PCI_HEADER_TYPE_ENDPOINT 0x00
#define PCI_HEADER_TYPE_PCI_PCI_BRIDGE 0x01
#define PCI_HEADER_TYPE_PCI_CARDBUS_BRIDGE 0x02
#define PCI_CONFIG_VENDOR_ID 0x00
#define PCI_CONFIG_DEVICE_ID 0x02
#define PCI_CONFIG_COMMAND 0x04
#define PCI_CONFIG_STATUS 0x06
#define PCI_CONFIG_REVISION_ID 0x08
#define PCI_CONFIG_PROG_IF 0x09
#define PCI_CONFIG_SUBCLASS 0x0A
#define PCI_CONFIG_CLASS_CODE 0x0B
#define PCI_CONFIG_CACHE_LINE_SIZE 0x0C
#define PCI_CONFIG_LATENCY_TIMER 0x0D
#define PCI_CONFIG_HEADER_TYPE 0x0E
#define PCI_CONFIG_BIST 0x0F
#define PCI_CONFIG_BAR0 0x10
#define PCI_CONFIG_BAR1 0x14
#define PCI_CONFIG_BAR2 0x18
#define PCI_CONFIG_BAR3 0x1C
#define PCI_CONFIG_BAR4 0x20
#define PCI_CONFIG_BAR5 0x24
#define PCI_CONFIG_CARDBUS_CIS_P 0x28
#define PCI_CONFIG_SUBSYSTEM_VENDOR_ID 0x2C
#define PCI_CONFIG_SUBSYSTEM_ID 0x2E
#define PCI_CONFIG_EXPANSION_ROM_ADDR 0x30
#define PCI_CONFIG_CAP_POINTER 0x34
#define PCI_CONFIG_INTERRUPT_LINE 0x3C
#define PCI_CONFIG_INTERRUPT_PIN 0x3D
#define PCI_CONFIG_MAX_GRANT 0x3E
#define PCI_CONFIG_MAX_LATENCY 0x3F
// header type 1
#define PCI_CONFIG_PRIMARY_BUS_NUMBER 0x18
#define PCI_CONFIG_SECONDARY_BUS_NUMBER 0x19
#define PCI_CONFIG_SUBORDINATE_BUS_NUMBER 0x1A
#define PCI_CONFIG_SECONDARY_LATENCY_TIMER 0x1B
#define PCI_CONFIG_IO_BASE 0x1C
#define PCI_CONFIG_IO_LIMIT 0x1D
#define PCI_CONFIG_SECONDARY_STATUS 0x1E
#define PCI_CONFIG_MEMORY_BASE 0x20
#define PCI_CONFIG_MEMORY_LIMIT 0x22
#define PCI_CONFIG_MEMORY_BASE_UPPER 0x28
#define PCI_CONFIG_MEMORY_LIMIT_UPPER 0x2C
#define PCI_CONFIG_IO_BASE_UPPER 0x30
#define PCI_CONFIG_IO_LIMIT_UPPER 0x32
#define PCI_CONFIG_EXPANSION_ROM 0x38
#define PCI_CONFIG_BRIDGE_CONTROL 0x3E
#define PCI_INTERRUPT_LINE_DISABLED 0xff
typedef struct pci_device pci_device;
typedef uint8_t (*pci_driver_use)(const pci_device *);
typedef uint8_t (*pci_driver_validate)(const pci_device *);
typedef uint8_t (*pci_driver_initialize)(pci_device *);
struct pci_driver {
const char *name;
const char *description;
struct {
uint8_t class;
uint8_t subclass;
uint8_t interface;
uint16_t vendor;
uint16_t device;
} match;
struct {
bool class: 1;
bool subclass: 1;
bool interface: 1;
bool vendor: 1;
bool device: 1;
} mask;
struct {
bool direct_use: 1;
bool validatable: 1;
bool initialisable: 1;
};
pci_driver_use use;
pci_driver_validate validate;
pci_driver_initialize initialize;
} __attribute__((__aligned__(STRUCT_ALIGNMENT)));
#define PCI_DRIVER(order) GENERIC_DRIVER(pci_driver, order)
typedef struct {
uint32_t address;
uint32_t size;
uint8_t present: 1;
uint8_t is_io_space: 1;
uint8_t type: 2;
uint8_t prefetchable: 1;
} bar_info;
typedef struct pci_device {
uint8_t bus;
uint8_t slot;
uint8_t func;
union {
struct {
uint16_t vendorId;
uint16_t deviceId;
};
uint32_t config_line_0;
};
union {
struct {
uint8_t revisionId;
uint8_t programInterface;
uint8_t subclass;
uint8_t class;
};
uint32_t config_line_2;
};
union {
struct {
uint8_t cacheLineSize;
uint8_t latencyTimer;
uint8_t headerType;
uint8_t bist;
};
uint32_t config_line_3;
};
bar_info bar0;
bar_info bar1;
bar_info bar2;
bar_info bar3;
bar_info bar4;
bar_info bar5;
const struct pci_driver *pci_driver;
struct {
uint8_t present: 1;
} device_state;
struct {
uint8_t initialized: 1;
} driver_state;
} pci_device;
typedef union {
uint16_t value;
struct {
bool io_space: 1;
bool mem_space: 1;
bool bus_master: 1;
bool special_cycles: 1;
bool mem_write_invalidate_enable: 1;
bool vga_palette_snoop: 1;
bool parity_error_response: 1;
uint8_t reserved: 1;
bool serr_enable: 1;
bool fast_b2b_enable: 1;
bool interrupt_disable: 1;
uint8_t reserved2: 5;
} packed command;
} pci_command_register_t;
typedef union {
uint16_t value;
struct {
uint8_t reserved: 3;
bool interrupt_status: 1;
bool capabilities_list: 1;
bool speed_66mhz_capable: 1;
uint8_t reserved2: 1;
bool fast_b2b_capable: 1;
bool master_data_parity_error: 1;
uint8_t devsel_timing: 2;
bool signaled_target_abort: 1;
bool received_target_abort: 1;
bool received_master_abort: 1;
bool signaled_system_error: 1;
bool detected_parity_error: 1;
} packed status;
} pci_status_register_t;
void pci_print_info();
void pci_dump_caps();
#ifdef ENABLE_PCIPP
void pci_pretty_print();
#endif
void pci_init_drivers();
void pci_scan();
uint32_t pci_config_read_double_word(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset);
uint16_t pci_config_read_word(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset);
uint8_t pci_config_read_byte(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset);
void pci_config_write_double_word(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint32_t value);
void pci_config_write_word(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint16_t value);
void pci_config_write_byte(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint8_t value);
void pci_init_bar(pci_device *device, uint8_t bar_index);
#endif //NEW_KERNEL_PCI_H

296
kernel/drivers/pci_devices.h
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@@ -1,296 +0,0 @@
//
// Created by rick on 06-03-21.
//
#ifndef NEW_KERNEL_PCI_DEVICES_H
#define NEW_KERNEL_PCI_DEVICES_H
#include <types.h>
typedef struct pci_device_info_t {
uint8_t code;
char *name;
struct pci_device_info_t *sub;
} pci_device_info;
// build from https://wiki.osdev.org/PCI#Class_Codes
pci_device_info info_unclassified[] = {
{0x00, "Non VGA Compatible", NULL},
{0x01, "VGA Compatible", NULL},
{0, NULL, NULL},
};
pci_device_info info_mass_storage_ide[] = {
{0x00, "ISA comp only", NULL},
{0x05, "PCI native only", NULL},
{0x0A, "ISA compatibility controller, 2C, PCI native", NULL},
{0x0F, "PCI native controller, 2C, ISA comp", NULL},
{0x80, "ISA comp only, BM", NULL},
{0x85, "PCI native only, BM", NULL},
{0x8A, "ISA Comp only, 2C, BM, PCI native", NULL},
{0x8F, "PCI native, 2C, BM, ISA comp", NULL},
{0, NULL, NULL},
};
pci_device_info info_mass_storage_ata[] = {
{0x20, "Single DMA", NULL},
{0x30, "Chained DMA", NULL},
{0, NULL, NULL},
};
pci_device_info info_mass_storage_sata[] = {
{0x00, "Vendor specific", NULL},
{0x01, "AHCI 1.0", NULL},
{0x02, "Serial Storage Bus", NULL},
{0, NULL, NULL},
};
pci_device_info info_mass_storage_sas[] = {
{0x00, "SAS", NULL},
{0x01, "Serial Storage Bus", NULL},
{0, NULL, NULL},
};
pci_device_info info_mass_storage_nvm[] = {
{0x01, "NVMHCI", NULL},
{0x02, "NVM Express", NULL},
{0, NULL, NULL},
};
pci_device_info info_mass_storage[] = {
{0x00, "SCSI Bus Controller", NULL},
{0x01, "IDE Controller", info_mass_storage_ide},
{0x02, "Floppy Disk Controller", NULL},
{0x03, "IPI Bus Controller", NULL},
{0x04, "RAID Controller", NULL},
{0x05, "ATA Controller", info_mass_storage_ata},
{0x06, "Serial ATA", info_mass_storage_sata},
{0x07, "Serial Attached SCSI", info_mass_storage_sas},
{0x08, "NVM Controller", info_mass_storage_nvm},
{0x80, "Other", NULL},
{0, NULL, NULL},
};
pci_device_info info_network_controller[] = {
{0x00, "Ethernet", NULL},
{0x01, "Token Ring", NULL},
{0x02, "FDDI", NULL},
{0x03, "ATM", NULL},
{0x04, "ISDN", NULL},
{0x05, "WordFip", NULL},
{0x06, "FICMG 2.14 Multi Computing", NULL},
{0x07, "Infiniband", NULL},
{0x08, "Fabric", NULL},
{0x80, "Other", NULL},
{0, NULL, NULL},
};
pci_device_info info_display_vga_comp[] = {
{0x00, "VGA", NULL},
{0x01, "8514", NULL},
{0, NULL, 0},
};
pci_device_info info_display_controller[] = {
{0x00, "VGA Compatible", info_display_vga_comp},
{0x01, "XGA", NULL},
{0x02, "3D", NULL},
{0x80, "Other", NULL},
{0, NULL, NULL},
};
pci_device_info info_multimedia_controller[] = {
{0x00, "Video", NULL},
{0x01, "Audio", NULL},
{0x02, "Computer Telephony", NULL},
{0x03, "Audio", NULL},
{0x80, "Other", NULL},
{0, NULL, NULL},
};
pci_device_info info_memory_controller[] = {
{0x00, "RAM", NULL},
{0x01, "Flash", NULL},
{0x80, "Other", NULL},
{0, NULL, NULL},
};
pci_device_info info_bridge_pci4[] = {
{0x00, "Normal", NULL},
{0x01, "Subtractive", NULL},
{0, NULL, NULL},
};
pci_device_info info_bridge_raceway[] = {
{0x00, "Transparent", NULL},
{0x01, "Endpoint", NULL},
{0, NULL, NULL},
};
pci_device_info info_bridge_pci9[] = {
{0x40, "Semi-transparent, primary", NULL},
{0x80, "Semi-transparent, secondary", NULL},
{0, NULL, NULL},
};
pci_device_info info_bridge_device[] = {
{0x00, "Host", NULL},
{0x01, "ISA", NULL},
{0x02, "EISA", NULL},
{0x03, "MCA", NULL},
{0x04, "PCI-to-PCI4", info_bridge_pci4},
{0x05, "PMCIA", NULL},
{0x06, "NuBus", NULL},
{0x07, "CardBus", NULL},
{0x08, "RACEway", info_bridge_raceway},
{0x09, "PCI-to-PCI9", info_bridge_pci9},
{0x0A, "Infiniband-to-host", NULL},
{0x80, "Other", NULL},
{0, NULL, NULL},
};
pci_device_info info_simple_comm[] = {
{0x00, "Serial", NULL}, // todo sub
{0x01, "Parallel", NULL}, // todo sub
{0x02, "Multiport serial", NULL},
{0x03, "Modem", NULL}, // todo sub
{0x04, "IEEE 488.1/2 GPIB", NULL},
{0x05, "Smart card", NULL},
{0x80, "Other", NULL},
{0, NULL, NULL},
};
pci_device_info info_base_system_peripheral[] = {
{0x00, "PIC", NULL}, // todo sub
{0x01, "DMA", NULL}, // todo sub
{0x02, "Timer", NULL}, // todo sub
{0x03, "RTC", NULL}, // todo sub
{0x04, "PCI Hot Plug", NULL},
{0x05, "SD", NULL},
{0x06, "IOMMU", NULL},
{0x80, "Other", NULL},
{0, NULL, NULL},
};
pci_device_info info_input_device[] = {
{0x00, "Keyboard", NULL},
{0x01, "Digitizer pen", NULL},
{0x02, "Mouse", NULL},
{0x03, "Scanner", NULL},
{0x04, "Game Port", NULL}, // todo sub
{0x80, "Other", NULL},
{0, NULL, NULL},
};
pci_device_info info_docking_station[] = {
{0x00, "Generic", NULL},
{0x80, "Other", NULL},
{0, NULL, NULL},
};
pci_device_info info_processor[] = {
{0x00, "386", NULL},
{0x01, "486", NULL},
{0x02, "Pentium", NULL},
{0x03, "Pentium Pro", NULL},
{0x10, "Alpha", NULL},
{0x20, "PowerPC", NULL},
{0x30, "MIPS", NULL},
{0x40, "Co-Processor", NULL},
{0x80, "Other", NULL},
{0, NULL, NULL},
};
pci_device_info info_serial_bus_usb[] = {
{0x00, "UHCI (1.0)", NULL},
{0x10, "OHCI (1.1)", NULL},
{0x20, "EHCI (2.0)", NULL},
{0x30, "XHCI (3.0)", NULL},
{0x80, "Unspecified", NULL},
{0xFE, "Device", NULL},
{0, NULL, NULL},
};
pci_device_info info_serial_bus[] = {
{0x00, "FireWire", NULL}, // todo sub
{0x01, "ACCESS bus", NULL},
{0x02, "SSA", NULL},
{0x03, "USB", info_serial_bus_usb},
{0x04, "Fibre Channel", NULL},
{0x05, "SMBus", NULL},
{0x06, "InfiniBand", NULL},
{0x07, "IPMI Interface", NULL}, // todo sub
{0x08, "SERCOS", NULL},
{0x09, "CanBus", NULL},
{0x80, "Other", NULL},
{0, NULL, NULL},
};
pci_device_info info_wireless[] = {
{0x00, "IRDA Comp", NULL},
{0x01, "Consumer IR", NULL},
{0x10, "RF", NULL},
{0x11, "Bluetooth", NULL},
{0x12, "Broadband", NULL},
{0x20, "Ethernet 802.1a", NULL},
{0x21, "Ethernet 802.1b", NULL},
{0x80, "Other", NULL},
{0, NULL, NULL},
};
pci_device_info info_intelligent[] = {
{0x00, "I20", NULL},
{0, NULL, NULL},
};
pci_device_info info_satellite[] = {
{0x01, "Satellite TV", NULL},
{0x02, "Satellite Audio", NULL},
{0x03, "Satellite Voice", NULL},
{0x04, "Satellite Data", NULL},
{0, NULL, NULL},
};
pci_device_info info_encryption[] = {
{0x00, "Network and Computing", NULL},
{0x10, "Entertainment", NULL},
{0x80, "Other", NULL},
{0, NULL, NULL},
};
pci_device_info info_signal_processing[] = {
{0x00, "DPIO Modules", NULL},
{0x01, "Performance Counters", NULL},
{0x10, "Communication Synchronizer", NULL},
{0x20, "Signal Processing Management", NULL},
{0x80, "Other", NULL},
{0, NULL, NULL},
};
pci_device_info pci_root_info[] = {
{0x00, "Unclassified", info_unclassified},
{0x01, "Mass Storage", info_mass_storage},
{0x02, "Network", info_network_controller},
{0x03, "Display", info_display_controller},
{0x04, "Multimedia", info_multimedia_controller},
{0x05, "Memory", info_memory_controller},
{0x06, "Bridge", info_bridge_device},
{0x07, "Simple Communication", info_simple_comm},
{0x08, "Base System Peripheral", info_base_system_peripheral},
{0x09, "Input Device", info_input_device},
{0x0a, "Docking", info_docking_station},
{0x0b, "Processor", info_processor},
{0x0c, "Serial Bus", info_serial_bus},
{0x0d, "Wireless", info_wireless},
{0x0e, "Intelligent", info_intelligent},
{0x0f, "Satellite Comm", info_satellite},
{0x10, "Encryption", info_encryption},
{0x11, "Signal Processing", info_signal_processing},
{0x12, "Processing Accelerator", NULL},
{0x13, "Non-Essential", NULL},
{0x40, "Co-Processor", NULL},
{0xFF, "Unassigned", NULL},
{0, NULL, NULL},
};
#endif //NEW_KERNEL_PCI_DEVICES_H

2
kernel/drivers/ports.c
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@@ -6,7 +6,7 @@
*/
#include "ports.h"
#include <drivers/ports.h>
/**
* Read a byte from the specified port

74
kernel/drivers/ports.h
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@@ -1,74 +0,0 @@
#ifndef MY_KERNEL_DRIVERS_PORT_H
#define MY_KERNEL_DRIVERS_PORT_H
#define PORT_PIC_MASTER_COMMAND 0x20
#define PORT_PIC_MASTER_DATA 0x21
#define PORT_PIC_SLAVE_COMMAND 0xA0
#define PORT_PIC_SLAVE_DATA 0xA1
// https://wiki.osdev.org/PIT
#define PORT_PIT_COMMAND 0x43
#define PORT_PIT_DATA_0 0x40
#define PORT_PIT_DATA_1 0x41
#define PORT_PIT_DATA_3 0x42
// https://wiki.osdev.org/%228042%22_PS/2_Controller
#define PORT_PS2_DATA 0x60
#define PORT_PS2_STATUS 0x64
#define PORT_PS2_COMMAND 0x64
//http://www.osdever.net/FreeVGA/vga/crtcreg.htm#0A
#define PORT_REG_SCREEN_CTRL 0x3d4
#define PORT_REG_SCREEN_CTRL_CURSOR_H 0x0E
#define PORT_REG_SCREEN_CTRL_CURSOR_L 0x0F
#define PORT_REG_SCREEN_DATA 0x3d5
// https://wiki.osdev.org/Serial_Ports
#define PORT_SERIAL_0 0x3f8
#define PORT_SERIAL_1 0x2f8
#define PORT_SERIAL_2 0x3e8
#define PORT_SERIAL_3 0x2e8
#define PORT_SERIAL_DATA 0
#define PORT_SERIAL_INTERRUPT 1
#define PORT_SERIAL_DLAB_LSB 0
#define PORT_SERIAL_DLAB_MSB 1
#define PORT_SERIAL_INTERRUPT_ID_FIFO 2
#define PORT_SERIAL_LINE_CONTROL 3
#define PORT_SERIAL_MODEM_CONTROL 4
#define PORT_SERIAL_LINE_STATUS 5
#define PORT_SERIAL_MODEM_STATUS 6
#define PORT_SERIAL_SCRATCH 6
#define PORT_ACPI 0xB004
#define PORT_ACPI_SHUTDOWN 0x2000
#define PORT_QEMU_COMMAND 0x604
#define PORT_QEMU_COMMAND_SHUTDOWN 0x2000
#define PORT_VBOX 0x4004
#define PORT_VBOX_SHUTDOWN 0x3400
// https://wiki.osdev.org/PCI
#define PORT_PCI_CONFIG_ADDRESS (0xCF8)
#define PORT_PCI_CONFIG_DATA (0xCFC)
unsigned char port_byte_in(unsigned short port);
void port_byte_out(unsigned short port, unsigned char data);
unsigned short port_word_in(unsigned short port);
void port_word_out(unsigned short port, unsigned short data);
unsigned int port_double_word_in(unsigned int port);
void port_double_word_out(unsigned short port, unsigned int data);
void port_word_out_repeat(unsigned short port, unsigned short *data, int buffer_size);
void port_word_in_repeat(unsigned short port, unsigned short *data, int buffer_size);
void port_double_word_in_repeat(unsigned short port, unsigned int *data, int buffer_size);
#endif

2
kernel/drivers/serial.c
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@@ -2,7 +2,7 @@
// Created by rick on 28-01-21.
//
#include "serial.h"
#include <drivers/serial.h>
#include <types.h>
#include <drivers/ports.h>

12
kernel/drivers/serial.h
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@@ -1,12 +0,0 @@
//
// Created by rick on 28-01-21.
//
#ifndef NEW_KERNEL_SERIAL_H
#define NEW_KERNEL_SERIAL_H
int serial_init();
void serial_kprint(const char *msg);
#endif //NEW_KERNEL_SERIAL_H

2
kernel/drivers/vgascreen.c
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@@ -2,7 +2,7 @@
// Created by rick on 8/18/19.
//
#include "vgascreen.h"
#include <drivers/vgascreen.h>
#include <libc/libc.h>
#include <drivers/ports.h>

34
kernel/drivers/vgascreen.h
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@@ -1,34 +0,0 @@
//
// Created by rick on 8/18/19.
//
#ifndef MY_KERNEL_DRIVERS_VGASCREEN_H
#define MY_KERNEL_DRIVERS_VGASCREEN_H
#define VGA_CHARACTER_MEMORY_LOCATION 0xb8000
#define VGA_BLACK 0x0
#define VGA_BLUE 0x1
#define VGA_GREEN 0x2
#define VGA_CIAN 0x3
#define VGA_RED 0x4
#define VGA_PURPLE 0x5
#define VGA_ORANGE 0x6
#define VGA_GRAY 0x7
#define VGA_DARK_GRAY 0x8
#define VGA_LIGHT_BLUE 0x9
#define VGA_LIGHT_GREEN 0xA
#define VGA_LIGHT_RED 0xB
#define VGA_PINK 0xD
#define VGA_YELLOW 0xE
#define VGA_WHITE 0xF
#define VGA_SHIFT_BG 4
#define VGA_BLINK 0x80
#define VGA_COL_MAX 80
#define VGA_ROW_MAX 25
void vga_clear_screen();
void vga_kprint(const char *msg);
#endif //MY_KERNEL_VGASCREEN_H