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feat: refactor to use gcc types

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This commit is contained in:
Rick Rongen
2021-02-12 22:16:03 +01:00
parent 555c1177a6
commit 8f615b259c
33 changed files with 419 additions and 361 deletions
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52
kernel/drivers/ide.c
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@@ -8,7 +8,7 @@
#include <types.h>
#include <kprint.h>
#include <drivers/pci.h>
#include <libc/stdbool.h>
#include <stdbool.h>
#include <libk.h>
#include <cpu/timer.h>
#include <libc/kprintf.h>
@@ -131,16 +131,16 @@ struct ide_device {
} ide_devices[4];
typedef struct {
u8 device_number: 2;
u8 print_error: 1;
uint8_t device_number: 2;
uint8_t print_error: 1;
} ide_block_device_info;
u8 ide_read(u8 channel, u8 reg);
uint8_t ide_read(uint8_t channel, uint8_t reg);
void ide_write(u8 channel, u8 reg, u8 data);
void ide_write(uint8_t channel, uint8_t reg, uint8_t data);
u8 ide_read(u8 channel, u8 reg) {
u8 result;
uint8_t ide_read(uint8_t channel, uint8_t reg) {
uint8_t result;
if (reg & 0x10) {
ide_write(channel, ATA_REG_CONTROL, 0x80 | channels[channel].nIEN);
result = port_byte_in(channels[channel].base + (reg & 0xF));
@@ -163,7 +163,7 @@ u8 ide_read(u8 channel, u8 reg) {
return result;
}
void ide_write(u8 channel, u8 reg, u8 data) {
void ide_write(uint8_t channel, uint8_t reg, uint8_t data) {
if (reg & 0x10) {
ide_write(channel, ATA_REG_CONTROL, 0x80 | channels[channel].nIEN);
port_byte_out(channels[channel].base + (reg & 0xF), data);
@@ -221,7 +221,7 @@ void ide_read_buffer(unsigned char channel, unsigned char reg, unsigned int *buf
// }
}
unsigned char ide_polling(unsigned char channel, u8 advanced_check) {
unsigned char ide_polling(unsigned char channel, uint8_t advanced_check) {
// (I) Delay 400 nanosecond for BSY to be set:
// -------------------------------------------------
@@ -319,9 +319,9 @@ unsigned char ide_print_error(unsigned int drive, unsigned char err) {
return err;
}
u8 ide_pci_validate(const pci_device *device);
uint8_t ide_pci_validate(const pci_device *device);
u8 ide_pci_initialize(pci_device *device);
uint8_t ide_pci_initialize(pci_device *device);
const pci_driver ide_pci_driver = {
.name = "pci-ide",
@@ -335,7 +335,7 @@ const pci_driver ide_pci_driver = {
.initialize = ide_pci_initialize,
};
u8 ide_pci_validate(const pci_device *device) {
uint8_t ide_pci_validate(const pci_device *device) {
if (device->class != PCI_CLASS_MASS_STORAGE
|| device->subclass != PCI_SUB_CLASS_IDE
|| (device->programInterface != 0x8A && device->programInterface != 0x80)) {
@@ -345,7 +345,7 @@ u8 ide_pci_validate(const pci_device *device) {
return PCI_VALIDATE_OK;
}
void ide_fix_bar(bar_info *bar, u32 default_address, u32 size) {
void ide_fix_bar(bar_info *bar, uint32_t default_address, uint32_t size) {
if (bar->address == 0x0) {
// no need to actually write ti back
bar->address = default_address;
@@ -394,9 +394,9 @@ bool ide_pci_init_channels(pci_device *device) {
return true;
}
u8 ide_block_dev_access(const block_device *device, u8 direction, u32 lba, u8 sectors, void *target) {
uint8_t ide_block_dev_access(const block_device *device, uint8_t direction, uint32_t lba, uint8_t sectors, void *target) {
ide_block_device_info *info = device->device_info;
u8 result = ide_access(direction, info->device_number, lba, sectors, target);
uint8_t result = ide_access(direction, info->device_number, lba, sectors, target);
if (result != 0) {
if (info->print_error) {
ide_print_error(info->device_number, result);
@@ -431,7 +431,7 @@ void ide_register_block_devices() {
}
}
u8 ide_pci_initialize(pci_device *device) {
uint8_t ide_pci_initialize(pci_device *device) {
if (!ide_pci_init_channels(device)) {
return PCI_INIT_FAIL;
@@ -541,15 +541,15 @@ void ide_register() {
pci_register_driver(&ide_pci_driver);
}
u8 ide_read_ata_access(u8 direction, u8 drive, u32 lba, u8 numsects, void *target) {
u8 lba_mode /* 0: CHS, 1:LBA28, 2: LBA48 */, dma /* 0: No DMA, 1: DMA */, cmd;
u8 lba_io[6];
u8 channel = ide_devices[drive].channel;
u8 slavebit = ide_devices[drive].drive;
u32 bus = channels[channel].base;
u32 words = 256;
u16 cyl, i;
u8 head, sect, err;
uint8_t ide_read_ata_access(uint8_t direction, uint8_t drive, uint32_t lba, uint8_t numsects, void *target) {
uint8_t lba_mode /* 0: CHS, 1:LBA28, 2: LBA48 */, dma /* 0: No DMA, 1: DMA */, cmd;
uint8_t lba_io[6];
uint8_t channel = ide_devices[drive].channel;
uint8_t slavebit = ide_devices[drive].drive;
uint32_t bus = channels[channel].base;
uint32_t words = 256;
uint16_t cyl, i;
uint8_t head, sect, err;
ide_write(channel, ATA_REG_CONTROL, channels[channel].nIEN = (ide_irq_invoked = 0x0) + 0x02);
@@ -667,7 +667,7 @@ u8 ide_read_ata_access(u8 direction, u8 drive, u32 lba, u8 numsects, void *targe
return 0;
}
u8 ide_access(u8 direction, u8 drive, u32 lba, u8 numsects, void *target) {
uint8_t ide_access(uint8_t direction, uint8_t drive, uint32_t lba, uint8_t numsects, void *target) {
if (drive > 3
|| ide_devices[drive].reserved == 0
|| ide_devices[drive].type == IDE_ATAPI) {