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feat: refactor to use gcc types

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This commit is contained in:
Rick Rongen
2021-02-12 22:16:03 +01:00
parent 555c1177a6
commit 8f615b259c
33 changed files with 419 additions and 361 deletions
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52
kernel/drivers/ide.c
View File

@@ -8,7 +8,7 @@
#include <types.h>
#include <kprint.h>
#include <drivers/pci.h>
#include <libc/stdbool.h>
#include <stdbool.h>
#include <libk.h>
#include <cpu/timer.h>
#include <libc/kprintf.h>
@@ -131,16 +131,16 @@ struct ide_device {
} ide_devices[4];
typedef struct {
u8 device_number: 2;
u8 print_error: 1;
uint8_t device_number: 2;
uint8_t print_error: 1;
} ide_block_device_info;
u8 ide_read(u8 channel, u8 reg);
uint8_t ide_read(uint8_t channel, uint8_t reg);
void ide_write(u8 channel, u8 reg, u8 data);
void ide_write(uint8_t channel, uint8_t reg, uint8_t data);
u8 ide_read(u8 channel, u8 reg) {
u8 result;
uint8_t ide_read(uint8_t channel, uint8_t reg) {
uint8_t result;
if (reg & 0x10) {
ide_write(channel, ATA_REG_CONTROL, 0x80 | channels[channel].nIEN);
result = port_byte_in(channels[channel].base + (reg & 0xF));
@@ -163,7 +163,7 @@ u8 ide_read(u8 channel, u8 reg) {
return result;
}
void ide_write(u8 channel, u8 reg, u8 data) {
void ide_write(uint8_t channel, uint8_t reg, uint8_t data) {
if (reg & 0x10) {
ide_write(channel, ATA_REG_CONTROL, 0x80 | channels[channel].nIEN);
port_byte_out(channels[channel].base + (reg & 0xF), data);
@@ -221,7 +221,7 @@ void ide_read_buffer(unsigned char channel, unsigned char reg, unsigned int *buf
// }
}
unsigned char ide_polling(unsigned char channel, u8 advanced_check) {
unsigned char ide_polling(unsigned char channel, uint8_t advanced_check) {
// (I) Delay 400 nanosecond for BSY to be set:
// -------------------------------------------------
@@ -319,9 +319,9 @@ unsigned char ide_print_error(unsigned int drive, unsigned char err) {
return err;
}
u8 ide_pci_validate(const pci_device *device);
uint8_t ide_pci_validate(const pci_device *device);
u8 ide_pci_initialize(pci_device *device);
uint8_t ide_pci_initialize(pci_device *device);
const pci_driver ide_pci_driver = {
.name = "pci-ide",
@@ -335,7 +335,7 @@ const pci_driver ide_pci_driver = {
.initialize = ide_pci_initialize,
};
u8 ide_pci_validate(const pci_device *device) {
uint8_t ide_pci_validate(const pci_device *device) {
if (device->class != PCI_CLASS_MASS_STORAGE
|| device->subclass != PCI_SUB_CLASS_IDE
|| (device->programInterface != 0x8A && device->programInterface != 0x80)) {
@@ -345,7 +345,7 @@ u8 ide_pci_validate(const pci_device *device) {
return PCI_VALIDATE_OK;
}
void ide_fix_bar(bar_info *bar, u32 default_address, u32 size) {
void ide_fix_bar(bar_info *bar, uint32_t default_address, uint32_t size) {
if (bar->address == 0x0) {
// no need to actually write ti back
bar->address = default_address;
@@ -394,9 +394,9 @@ bool ide_pci_init_channels(pci_device *device) {
return true;
}
u8 ide_block_dev_access(const block_device *device, u8 direction, u32 lba, u8 sectors, void *target) {
uint8_t ide_block_dev_access(const block_device *device, uint8_t direction, uint32_t lba, uint8_t sectors, void *target) {
ide_block_device_info *info = device->device_info;
u8 result = ide_access(direction, info->device_number, lba, sectors, target);
uint8_t result = ide_access(direction, info->device_number, lba, sectors, target);
if (result != 0) {
if (info->print_error) {
ide_print_error(info->device_number, result);
@@ -431,7 +431,7 @@ void ide_register_block_devices() {
}
}
u8 ide_pci_initialize(pci_device *device) {
uint8_t ide_pci_initialize(pci_device *device) {
if (!ide_pci_init_channels(device)) {
return PCI_INIT_FAIL;
@@ -541,15 +541,15 @@ void ide_register() {
pci_register_driver(&ide_pci_driver);
}
u8 ide_read_ata_access(u8 direction, u8 drive, u32 lba, u8 numsects, void *target) {
u8 lba_mode /* 0: CHS, 1:LBA28, 2: LBA48 */, dma /* 0: No DMA, 1: DMA */, cmd;
u8 lba_io[6];
u8 channel = ide_devices[drive].channel;
u8 slavebit = ide_devices[drive].drive;
u32 bus = channels[channel].base;
u32 words = 256;
u16 cyl, i;
u8 head, sect, err;
uint8_t ide_read_ata_access(uint8_t direction, uint8_t drive, uint32_t lba, uint8_t numsects, void *target) {
uint8_t lba_mode /* 0: CHS, 1:LBA28, 2: LBA48 */, dma /* 0: No DMA, 1: DMA */, cmd;
uint8_t lba_io[6];
uint8_t channel = ide_devices[drive].channel;
uint8_t slavebit = ide_devices[drive].drive;
uint32_t bus = channels[channel].base;
uint32_t words = 256;
uint16_t cyl, i;
uint8_t head, sect, err;
ide_write(channel, ATA_REG_CONTROL, channels[channel].nIEN = (ide_irq_invoked = 0x0) + 0x02);
@@ -667,7 +667,7 @@ u8 ide_read_ata_access(u8 direction, u8 drive, u32 lba, u8 numsects, void *targe
return 0;
}
u8 ide_access(u8 direction, u8 drive, u32 lba, u8 numsects, void *target) {
uint8_t ide_access(uint8_t direction, uint8_t drive, uint32_t lba, uint8_t numsects, void *target) {
if (drive > 3
|| ide_devices[drive].reserved == 0
|| ide_devices[drive].type == IDE_ATAPI) {

2
kernel/drivers/ide.h
View File

@@ -9,7 +9,7 @@
void ide_register();
u8 ide_access(u8 direction, u8 drive, u32 lba, u8 numsects, void *target);
uint8_t ide_access(uint8_t direction, uint8_t drive, uint32_t lba, uint8_t numsects, void *target);
void ide_print_devices();

9
kernel/drivers/keyboard.c
View File

@@ -5,7 +5,6 @@
#include <drivers/ports.h>
#include <cpu/isr.h>
#include <libc/stdbool.h>
#include <libc/ringqueue.h>
#include <mem/mem.h>
#include <libk.h>
@@ -26,10 +25,10 @@ const char scancode_map_uppercase[] = {
};
struct {
u8 shift: 1;
u8 ctrl: 1;
u8 alt: 1;
u8 extended: 1;
uint8_t shift: 1;
uint8_t ctrl: 1;
uint8_t alt: 1;
uint8_t extended: 1;
} keyboard_state;
void *keyboard_event_buffer = NULL;

10
kernel/drivers/keyboard.h
View File

@@ -9,12 +9,12 @@
typedef struct KeyEvent_t {
// KeyCode key;
u32 scancode;
uint32_t scancode;
char ascii_code;
u8 is_release: 1;
u8 shift: 1;
u8 alt: 1;
u8 ctrl: 1;
uint8_t is_release: 1;
uint8_t shift: 1;
uint8_t alt: 1;
uint8_t ctrl: 1;
} KeyEvent;
char getc();

60
kernel/drivers/pci.c
View File

@@ -32,7 +32,7 @@ const pci_driver *pci_drivers[MAX_PCI_DRIVERS];
int last_pci_device_index = 0;
pci_device pci_devices[MAX_PCI_DEVICES];
u32 pci_register_driver(const pci_driver *pci_driver) {
uint32_t pci_register_driver(const pci_driver *pci_driver) {
for (int i = 0; i < MAX_PCI_DRIVERS; ++i) {
if (pci_drivers[i] != NULL) {
continue;
@@ -43,55 +43,55 @@ u32 pci_register_driver(const pci_driver *pci_driver) {
return PCI_REGISTER_ERR_FULL;
}
u32 pci_config_address(u8 bus, u8 slot, u8 func, u8 offset) {
uint32_t pci_config_address(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) {
return PCI_CONFIG_ENABLE
| ((u32) bus << PCI_CONFIG_SHIFT_BUS_NUMBER)
| ((u32) slot << PCI_CONFIG_SHIFT_DEV_NUMBER)
| ((u32) func << PCI_CONFIG_SHIFT_FUNC_NUMBER)
| ((uint32_t) bus << PCI_CONFIG_SHIFT_BUS_NUMBER)
| ((uint32_t) slot << PCI_CONFIG_SHIFT_DEV_NUMBER)
| ((uint32_t) func << PCI_CONFIG_SHIFT_FUNC_NUMBER)
| (offset & 0xFC);
}
u32 pci_config_read_double_word(u8 bus, u8 slot, u8 func, u8 offset) {
u32 address = pci_config_address(bus, slot, func, offset);
uint32_t pci_config_read_double_word(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) {
uint32_t address = pci_config_address(bus, slot, func, offset);
port_double_word_out(PORT_PCI_CONFIG_ADDRESS, address);
return port_double_word_in(PORT_PCI_CONFIG_DATA);
}
u16 pci_config_read_word(u8 bus, u8 slot, u8 func, u8 offset) {
u32 address = pci_config_address(bus, slot, func, offset);
uint16_t pci_config_read_word(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) {
uint32_t address = pci_config_address(bus, slot, func, offset);
port_double_word_out(PORT_PCI_CONFIG_ADDRESS, address);
return port_double_word_in(PORT_PCI_CONFIG_DATA) >> ((offset & 2) * 8) & 0xFFFF;
}
u8 pci_config_read_byte(u8 bus, u8 slot, u8 func, u8 offset) {
u32 address = pci_config_address(bus, slot, func, offset);
uint8_t pci_config_read_byte(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset) {
uint32_t address = pci_config_address(bus, slot, func, offset);
port_double_word_out(PORT_PCI_CONFIG_ADDRESS, address);
return port_double_word_in(PORT_PCI_CONFIG_DATA) >> ((offset & 0b11) * 8) & 0xFF;
}
void pci_config_write_double_word(u8 bus, u8 slot, u8 func, u8 offset, u32 value) {
u32 address = pci_config_address(bus, slot, func, offset);
void pci_config_write_double_word(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint32_t value) {
uint32_t address = pci_config_address(bus, slot, func, offset);
port_double_word_out(PORT_PCI_CONFIG_ADDRESS, address);
port_double_word_out(PORT_PCI_CONFIG_DATA, value);
}
void pci_config_write_word(u8 bus, u8 slot, u8 func, u8 offset, u16 value) {
u32 address = pci_config_address(bus, slot, func, offset);
void pci_config_write_word(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint16_t value) {
uint32_t address = pci_config_address(bus, slot, func, offset);
port_double_word_out(PORT_PCI_CONFIG_ADDRESS, address);
port_word_out(PORT_PCI_CONFIG_DATA, value);
}
void pci_config_write_byte(u8 bus, u8 slot, u8 func, u8 offset, u8 value) {
u32 address = pci_config_address(bus, slot, func, offset);
void pci_config_write_byte(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint8_t value) {
uint32_t address = pci_config_address(bus, slot, func, offset);
port_double_word_out(PORT_PCI_CONFIG_ADDRESS, address);
port_byte_out(PORT_PCI_CONFIG_DATA, value);
}
u16 pci_get_vendor_id(u8 bus, u8 slot, u8 func) {
uint16_t pci_get_vendor_id(uint8_t bus, uint8_t slot, uint8_t func) {
return pci_config_read_word(bus, slot, func, PCI_CONFIG_VENDOR_ID);
}
u8 pci_get_header_type(u8 bus, u8 slot, u8 func) {
uint8_t pci_get_header_type(uint8_t bus, uint8_t slot, uint8_t func) {
return pci_config_read_byte(bus, slot, func, PCI_CONFIG_HEADER_TYPE);
}
@@ -113,7 +113,7 @@ void pci_pick_driver(pci_device *device) {
}
}
void pci_check_function(u8 bus, u8 slot, u8 func) {
void pci_check_function(uint8_t bus, uint8_t slot, uint8_t func) {
pci_devices[last_pci_device_index].bus = bus;
pci_devices[last_pci_device_index].slot = slot;
pci_devices[last_pci_device_index].func = func;
@@ -127,12 +127,12 @@ void pci_check_function(u8 bus, u8 slot, u8 func) {
// todo do something with the function
}
void pci_check_device(u8 bus, u8 device) {
u8 function = 0;
u16 vendor_id = pci_get_vendor_id(bus, device, function);
void pci_check_device(uint8_t bus, uint8_t device) {
uint8_t function = 0;
uint16_t vendor_id = pci_get_vendor_id(bus, device, function);
if (vendor_id == 0xFFFF) return;
pci_check_function(bus, device, function);
u8 header_type = pci_get_header_type(bus, device, function);
uint8_t header_type = pci_get_header_type(bus, device, function);
if (header_type & PCI_HEADER_TYPE_MULTI_FUNC) {
for (function = 1; function < 8; ++function) {
if (pci_get_vendor_id(bus, device, function) != 0xFFFF) {
@@ -142,7 +142,7 @@ void pci_check_device(u8 bus, u8 device) {
}
}
void pci_check_bus(u8 bus) {
void pci_check_bus(uint8_t bus) {
for (int device = 0; device < 32; ++device) {
pci_check_device(bus, device);
}
@@ -156,7 +156,7 @@ void pci_scan() {
if (last_pci_device_index != 0) {
k_panics("Can only scan once!");
}
u8 header_type = pci_get_header_type(0, 0, 0);
uint8_t header_type = pci_get_header_type(0, 0, 0);
if (header_type & PCI_HEADER_TYPE_MULTI_FUNC) {
// multiple pci host controllers
for (int function = 0; function < 8; ++function) {
@@ -193,12 +193,12 @@ void pci_print_info() {
}
}
void pci_init_bar(pci_device *device, u8 bar_index) {
void pci_init_bar(pci_device *device, uint8_t bar_index) {
if (device->headerType != 0x00) {
k_panics("Only header 0x00 supported for now");
return;
}
u8 offset = 0;
uint8_t offset = 0;
bar_info *bar;
switch (bar_index) {
case 0:
@@ -231,9 +231,9 @@ void pci_init_bar(pci_device *device, u8 bar_index) {
}
u32 original_address = pci_config_read_double_word(device->bus, device->slot, device->func, offset);
uint32_t original_address = pci_config_read_double_word(device->bus, device->slot, device->func, offset);
pci_config_write_double_word(device->bus, device->slot, device->func, offset, 0xFFFFFFFF);
u32 masked_size = pci_config_read_double_word(device->bus, device->slot, device->func, offset);
uint32_t masked_size = pci_config_read_double_word(device->bus, device->slot, device->func, offset);
if (original_address & 0x1) {
// IO Space

76
kernel/drivers/pci.h
View File

@@ -60,60 +60,60 @@
typedef struct pci_driver pci_driver;
typedef struct pci_device pci_device;
typedef u8 (*pci_driver_validate)(const pci_device *);
typedef uint8_t (*pci_driver_validate)(const pci_device *);
typedef u8 (*pci_driver_initialize)(pci_device *);
typedef uint8_t (*pci_driver_initialize)(pci_device *);
typedef struct pci_driver {
const char *name;
const char *description;
u8 order;
u8 pci_class;
u8 pci_subclass;
uint8_t order;
uint8_t pci_class;
uint8_t pci_subclass;
struct {
u8 pci_use_subclass: 1;
uint8_t pci_use_subclass: 1;
};
pci_driver_validate validate;
pci_driver_initialize initialize;
} pci_driver;
typedef struct {
u32 address;
u32 size;
u8 present: 1;
u8 is_io_space: 1;
u8 type: 2;
u8 prefetchable: 1;
uint32_t address;
uint32_t size;
uint8_t present: 1;
uint8_t is_io_space: 1;
uint8_t type: 2;
uint8_t prefetchable: 1;
} bar_info;
typedef struct pci_device {
u8 bus;
u8 slot;
u8 func;
uint8_t bus;
uint8_t slot;
uint8_t func;
union {
struct {
u16 vendorId;
u16 deviceId;
uint16_t vendorId;
uint16_t deviceId;
};
u32 config_line_0;
uint32_t config_line_0;
};
union {
struct {
u8 revisionId;
u8 programInterface;
u8 subclass;
u8 class;
uint8_t revisionId;
uint8_t programInterface;
uint8_t subclass;
uint8_t class;
};
u32 config_line_2;
uint32_t config_line_2;
};
union {
struct {
u8 cacheLineSize;
u8 latencyTimer;
u8 headerType;
u8 bist;
uint8_t cacheLineSize;
uint8_t latencyTimer;
uint8_t headerType;
uint8_t bist;
};
u32 config_line_3;
uint32_t config_line_3;
};
bar_info bar0;
bar_info bar1;
@@ -123,16 +123,16 @@ typedef struct pci_device {
bar_info bar5;
const pci_driver *pci_driver;
struct {
u8 present: 1;
uint8_t present: 1;
} device_state;
struct {
u8 initialized: 1;
uint8_t initialized: 1;
} driver_state;
} pci_device;
void pci_print_info();
u32 pci_register_driver(const pci_driver *pci_driver);
uint32_t pci_register_driver(const pci_driver *pci_driver);
void pci_sort_drivers();
@@ -140,18 +140,18 @@ void pci_init_drivers();
void pci_scan();
u32 pci_config_read_double_word(u8 bus, u8 slot, u8 func, u8 offset);
uint32_t pci_config_read_double_word(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset);
u16 pci_config_read_word(u8 bus, u8 slot, u8 func, u8 offset);
uint16_t pci_config_read_word(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset);
u8 pci_config_read_byte(u8 bus, u8 slot, u8 func, u8 offset);
uint8_t pci_config_read_byte(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset);
void pci_config_write_double_word(u8 bus, u8 slot, u8 func, u8 offset, u32 value);
void pci_config_write_double_word(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint32_t value);
void pci_config_write_word(u8 bus, u8 slot, u8 func, u8 offset, u16 value);
void pci_config_write_word(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint16_t value);
void pci_config_write_byte(u8 bus, u8 slot, u8 func, u8 offset, u8 value);
void pci_config_write_byte(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint8_t value);
void pci_init_bar(pci_device *device, u8 bar_index);
void pci_init_bar(pci_device *device, uint8_t bar_index);
#endif //NEW_KERNEL_PCI_H

2
kernel/drivers/serial.c
View File

@@ -102,7 +102,7 @@ void write_serial(char a) {
}
void serial_kprint(const char *msg) {
u32 i = 0;
uint32_t i = 0;
while (1) {
char c = msg[i];
if (c == 0) {