feat: implemented errno, strtol. Started ustar. Reformatted headers and
code. Added some self-tests. Started prepwork for vfs.
This commit is contained in:
14
include/myke/drivers/pci/ide.h
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14
include/myke/drivers/pci/ide.h
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@@ -0,0 +1,14 @@
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//
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// Created by rick on 03-02-21.
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//
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#ifndef NEW_KERNEL_IDE_H
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#define NEW_KERNEL_IDE_H
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#include <sys/types.h>
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uint8_t ide_access(uint8_t direction, uint8_t drive, uint32_t lba, uint8_t numsects, void *target);
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void ide_print_devices();
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#endif //NEW_KERNEL_IDE_H
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243
include/myke/drivers/pci/pci.h
Normal file
243
include/myke/drivers/pci/pci.h
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@@ -0,0 +1,243 @@
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//
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// Created by rick on 02-02-21.
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//
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#ifndef NEW_KERNEL_PCI_H
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#define NEW_KERNEL_PCI_H
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#include <sys/types.h>
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#include <myke/driver.h>
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#include <stdbool.h>
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#include <myke/attributes.h>
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#define PCI_CLASS_MASS_STORAGE 0x01
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#define PCI_CLASS_BRIDGE 0x06
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// class MASS STORAGE 0x01
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#define PCI_SUB_CLASS_IDE 0x01
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// class BRIDGE 0x06
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#define PCI_SUB_CLASS_PCI_PCI_BRIDGE_4 0x04
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#define PCI_SUB_CLASS_PCI_PCI_BRIDGE_9 0x09
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#define PCI_REGISTER_OK 0
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#define PCI_REGISTER_ERR_FULL (-1)
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#define PCI_VALIDATE_OK 0
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#define PCI_VALIDATE_FAIL 1
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#define PCI_INIT_OK 0
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#define PCI_INIT_FAIL 1
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#define PCI_USE_OK 0
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#define PCI_USE_FAIL 1
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#define PCI_HEADER_TYPE_MULTI_FUNC 0x80
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#define PCI_HEADER_TYPE_ENDPOINT 0x00
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#define PCI_HEADER_TYPE_PCI_PCI_BRIDGE 0x01
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#define PCI_HEADER_TYPE_PCI_CARDBUS_BRIDGE 0x02
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#define PCI_CONFIG_VENDOR_ID 0x00
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#define PCI_CONFIG_DEVICE_ID 0x02
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#define PCI_CONFIG_COMMAND 0x04
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#define PCI_CONFIG_STATUS 0x06
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#define PCI_CONFIG_REVISION_ID 0x08
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#define PCI_CONFIG_PROG_IF 0x09
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#define PCI_CONFIG_SUBCLASS 0x0A
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#define PCI_CONFIG_CLASS_CODE 0x0B
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#define PCI_CONFIG_CACHE_LINE_SIZE 0x0C
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#define PCI_CONFIG_LATENCY_TIMER 0x0D
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#define PCI_CONFIG_HEADER_TYPE 0x0E
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#define PCI_CONFIG_BIST 0x0F
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#define PCI_CONFIG_BAR0 0x10
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#define PCI_CONFIG_BAR1 0x14
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#define PCI_CONFIG_BAR2 0x18
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#define PCI_CONFIG_BAR3 0x1C
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#define PCI_CONFIG_BAR4 0x20
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#define PCI_CONFIG_BAR5 0x24
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#define PCI_CONFIG_CARDBUS_CIS_P 0x28
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#define PCI_CONFIG_SUBSYSTEM_VENDOR_ID 0x2C
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#define PCI_CONFIG_SUBSYSTEM_ID 0x2E
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#define PCI_CONFIG_EXPANSION_ROM_ADDR 0x30
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#define PCI_CONFIG_CAP_POINTER 0x34
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#define PCI_CONFIG_INTERRUPT_LINE 0x3C
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#define PCI_CONFIG_INTERRUPT_PIN 0x3D
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#define PCI_CONFIG_MAX_GRANT 0x3E
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#define PCI_CONFIG_MAX_LATENCY 0x3F
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// header type 1
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#define PCI_CONFIG_PRIMARY_BUS_NUMBER 0x18
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#define PCI_CONFIG_SECONDARY_BUS_NUMBER 0x19
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#define PCI_CONFIG_SUBORDINATE_BUS_NUMBER 0x1A
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#define PCI_CONFIG_SECONDARY_LATENCY_TIMER 0x1B
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#define PCI_CONFIG_IO_BASE 0x1C
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#define PCI_CONFIG_IO_LIMIT 0x1D
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#define PCI_CONFIG_SECONDARY_STATUS 0x1E
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#define PCI_CONFIG_MEMORY_BASE 0x20
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#define PCI_CONFIG_MEMORY_LIMIT 0x22
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#define PCI_CONFIG_MEMORY_BASE_UPPER 0x28
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#define PCI_CONFIG_MEMORY_LIMIT_UPPER 0x2C
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#define PCI_CONFIG_IO_BASE_UPPER 0x30
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#define PCI_CONFIG_IO_LIMIT_UPPER 0x32
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#define PCI_CONFIG_EXPANSION_ROM 0x38
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#define PCI_CONFIG_BRIDGE_CONTROL 0x3E
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#define PCI_INTERRUPT_LINE_DISABLED 0xff
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typedef struct pci_device pci_device;
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typedef uint8_t (*pci_driver_use)(const pci_device *);
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typedef uint8_t (*pci_driver_validate)(const pci_device *);
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typedef uint8_t (*pci_driver_initialize)(pci_device *);
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struct pci_driver {
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const char *name;
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const char *description;
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struct {
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uint8_t class;
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uint8_t subclass;
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uint8_t interface;
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uint16_t vendor;
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uint16_t device;
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} match;
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struct {
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bool class: 1;
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bool subclass: 1;
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bool interface: 1;
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bool vendor: 1;
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bool device: 1;
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} mask;
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struct {
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bool direct_use: 1;
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bool validatable: 1;
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bool initialisable: 1;
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};
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pci_driver_use use;
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pci_driver_validate validate;
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pci_driver_initialize initialize;
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} __attribute__((__aligned__(STRUCT_ALIGNMENT)));
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#define PCI_DRIVER(order) GENERIC_DRIVER(pci_driver, order)
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typedef struct {
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uint32_t address;
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uint32_t size;
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uint8_t present: 1;
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uint8_t is_io_space: 1;
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uint8_t type: 2;
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uint8_t prefetchable: 1;
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} bar_info;
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typedef struct pci_device {
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uint8_t bus;
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uint8_t slot;
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uint8_t func;
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union {
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struct {
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uint16_t vendorId;
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uint16_t deviceId;
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};
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uint32_t config_line_0;
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};
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union {
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struct {
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uint8_t revisionId;
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uint8_t programInterface;
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uint8_t subclass;
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uint8_t class;
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};
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uint32_t config_line_2;
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};
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union {
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struct {
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uint8_t cacheLineSize;
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uint8_t latencyTimer;
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uint8_t headerType;
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uint8_t bist;
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};
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uint32_t config_line_3;
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};
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bar_info bar0;
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bar_info bar1;
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bar_info bar2;
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bar_info bar3;
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bar_info bar4;
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bar_info bar5;
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const struct pci_driver *pci_driver;
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struct {
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uint8_t present: 1;
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} device_state;
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struct {
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uint8_t initialized: 1;
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} driver_state;
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} pci_device;
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typedef union {
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uint16_t value;
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struct {
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bool io_space: 1;
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bool mem_space: 1;
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bool bus_master: 1;
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bool special_cycles: 1;
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bool mem_write_invalidate_enable: 1;
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bool vga_palette_snoop: 1;
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bool parity_error_response: 1;
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uint8_t reserved: 1;
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bool serr_enable: 1;
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bool fast_b2b_enable: 1;
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bool interrupt_disable: 1;
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uint8_t reserved2: 5;
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} packed command;
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} pci_command_register_t;
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typedef union {
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uint16_t value;
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struct {
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uint8_t reserved: 3;
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bool interrupt_status: 1;
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bool capabilities_list: 1;
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bool speed_66mhz_capable: 1;
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uint8_t reserved2: 1;
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bool fast_b2b_capable: 1;
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bool master_data_parity_error: 1;
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uint8_t devsel_timing: 2;
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bool signaled_target_abort: 1;
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bool received_target_abort: 1;
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bool received_master_abort: 1;
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bool signaled_system_error: 1;
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bool detected_parity_error: 1;
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} packed status;
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} pci_status_register_t;
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void pci_print_info();
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void pci_dump_caps();
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#ifdef ENABLE_PCIPP
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void pci_pretty_print();
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#endif
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void pci_init_drivers();
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void pci_scan();
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uint32_t pci_config_read_double_word(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset);
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uint16_t pci_config_read_word(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset);
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uint8_t pci_config_read_byte(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset);
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void pci_config_write_double_word(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint32_t value);
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void pci_config_write_word(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint16_t value);
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void pci_config_write_byte(uint8_t bus, uint8_t slot, uint8_t func, uint8_t offset, uint8_t value);
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void pci_init_bar(pci_device *device, uint8_t bar_index);
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#endif //NEW_KERNEL_PCI_H
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296
include/myke/drivers/pci/pci_devices.h
Normal file
296
include/myke/drivers/pci/pci_devices.h
Normal file
@@ -0,0 +1,296 @@
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//
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// Created by rick on 06-03-21.
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//
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#ifndef NEW_KERNEL_PCI_DEVICES_H
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#define NEW_KERNEL_PCI_DEVICES_H
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#include <sys/types.h>
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typedef struct pci_device_info_t {
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uint8_t code;
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char *name;
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struct pci_device_info_t *sub;
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} pci_device_info;
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// build from https://wiki.osdev.org/PCI#Class_Codes
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pci_device_info info_unclassified[] = {
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{0x00, "Non VGA Compatible", NULL},
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{0x01, "VGA Compatible", NULL},
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{0, NULL, NULL},
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};
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pci_device_info info_mass_storage_ide[] = {
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{0x00, "ISA comp only", NULL},
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{0x05, "PCI native only", NULL},
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{0x0A, "ISA compatibility controller, 2C, PCI native", NULL},
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{0x0F, "PCI native controller, 2C, ISA comp", NULL},
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{0x80, "ISA comp only, BM", NULL},
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{0x85, "PCI native only, BM", NULL},
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{0x8A, "ISA Comp only, 2C, BM, PCI native", NULL},
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{0x8F, "PCI native, 2C, BM, ISA comp", NULL},
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{0, NULL, NULL},
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};
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pci_device_info info_mass_storage_ata[] = {
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{0x20, "Single DMA", NULL},
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{0x30, "Chained DMA", NULL},
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{0, NULL, NULL},
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};
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pci_device_info info_mass_storage_sata[] = {
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{0x00, "Vendor specific", NULL},
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{0x01, "AHCI 1.0", NULL},
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{0x02, "Serial Storage Bus", NULL},
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{0, NULL, NULL},
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};
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pci_device_info info_mass_storage_sas[] = {
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{0x00, "SAS", NULL},
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{0x01, "Serial Storage Bus", NULL},
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{0, NULL, NULL},
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};
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pci_device_info info_mass_storage_nvm[] = {
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{0x01, "NVMHCI", NULL},
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{0x02, "NVM Express", NULL},
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{0, NULL, NULL},
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};
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pci_device_info info_mass_storage[] = {
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{0x00, "SCSI Bus Controller", NULL},
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{0x01, "IDE Controller", info_mass_storage_ide},
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{0x02, "Floppy Disk Controller", NULL},
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{0x03, "IPI Bus Controller", NULL},
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{0x04, "RAID Controller", NULL},
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{0x05, "ATA Controller", info_mass_storage_ata},
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{0x06, "Serial ATA", info_mass_storage_sata},
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{0x07, "Serial Attached SCSI", info_mass_storage_sas},
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{0x08, "NVM Controller", info_mass_storage_nvm},
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{0x80, "Other", NULL},
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{0, NULL, NULL},
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};
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pci_device_info info_network_controller[] = {
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{0x00, "Ethernet", NULL},
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{0x01, "Token Ring", NULL},
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{0x02, "FDDI", NULL},
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{0x03, "ATM", NULL},
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{0x04, "ISDN", NULL},
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{0x05, "WordFip", NULL},
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{0x06, "FICMG 2.14 Multi Computing", NULL},
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{0x07, "Infiniband", NULL},
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{0x08, "Fabric", NULL},
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{0x80, "Other", NULL},
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{0, NULL, NULL},
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};
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pci_device_info info_display_vga_comp[] = {
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{0x00, "VGA", NULL},
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{0x01, "8514", NULL},
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{0, NULL, 0},
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};
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pci_device_info info_display_controller[] = {
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{0x00, "VGA Compatible", info_display_vga_comp},
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{0x01, "XGA", NULL},
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{0x02, "3D", NULL},
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{0x80, "Other", NULL},
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{0, NULL, NULL},
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};
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pci_device_info info_multimedia_controller[] = {
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{0x00, "Video", NULL},
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{0x01, "Audio", NULL},
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{0x02, "Computer Telephony", NULL},
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{0x03, "Audio", NULL},
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{0x80, "Other", NULL},
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{0, NULL, NULL},
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};
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pci_device_info info_memory_controller[] = {
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{0x00, "RAM", NULL},
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{0x01, "Flash", NULL},
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{0x80, "Other", NULL},
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{0, NULL, NULL},
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};
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pci_device_info info_bridge_pci4[] = {
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{0x00, "Normal", NULL},
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{0x01, "Subtractive", NULL},
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{0, NULL, NULL},
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};
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pci_device_info info_bridge_raceway[] = {
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{0x00, "Transparent", NULL},
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{0x01, "Endpoint", NULL},
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{0, NULL, NULL},
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};
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pci_device_info info_bridge_pci9[] = {
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{0x40, "Semi-transparent, primary", NULL},
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{0x80, "Semi-transparent, secondary", NULL},
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{0, NULL, NULL},
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};
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pci_device_info info_bridge_device[] = {
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{0x00, "Host", NULL},
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{0x01, "ISA", NULL},
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{0x02, "EISA", NULL},
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{0x03, "MCA", NULL},
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{0x04, "PCI-to-PCI4", info_bridge_pci4},
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{0x05, "PMCIA", NULL},
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{0x06, "NuBus", NULL},
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{0x07, "CardBus", NULL},
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{0x08, "RACEway", info_bridge_raceway},
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{0x09, "PCI-to-PCI9", info_bridge_pci9},
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{0x0A, "Infiniband-to-host", NULL},
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{0x80, "Other", NULL},
|
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{0, NULL, NULL},
|
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};
|
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pci_device_info info_simple_comm[] = {
|
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{0x00, "Serial", NULL}, // todo sub
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{0x01, "Parallel", NULL}, // todo sub
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||||
{0x02, "Multiport serial", NULL},
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{0x03, "Modem", NULL}, // todo sub
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||||
{0x04, "IEEE 488.1/2 GPIB", NULL},
|
||||
{0x05, "Smart card", NULL},
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||||
{0x80, "Other", NULL},
|
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{0, NULL, NULL},
|
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};
|
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|
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pci_device_info info_base_system_peripheral[] = {
|
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{0x00, "PIC", NULL}, // todo sub
|
||||
{0x01, "DMA", NULL}, // todo sub
|
||||
{0x02, "Timer", NULL}, // todo sub
|
||||
{0x03, "RTC", NULL}, // todo sub
|
||||
{0x04, "PCI Hot Plug", NULL},
|
||||
{0x05, "SD", NULL},
|
||||
{0x06, "IOMMU", NULL},
|
||||
{0x80, "Other", NULL},
|
||||
{0, NULL, NULL},
|
||||
};
|
||||
|
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pci_device_info info_input_device[] = {
|
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{0x00, "Keyboard", NULL},
|
||||
{0x01, "Digitizer pen", NULL},
|
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{0x02, "Mouse", NULL},
|
||||
{0x03, "Scanner", NULL},
|
||||
{0x04, "Game Port", NULL}, // todo sub
|
||||
{0x80, "Other", NULL},
|
||||
{0, NULL, NULL},
|
||||
};
|
||||
|
||||
pci_device_info info_docking_station[] = {
|
||||
{0x00, "Generic", NULL},
|
||||
{0x80, "Other", NULL},
|
||||
{0, NULL, NULL},
|
||||
};
|
||||
|
||||
pci_device_info info_processor[] = {
|
||||
{0x00, "386", NULL},
|
||||
{0x01, "486", NULL},
|
||||
{0x02, "Pentium", NULL},
|
||||
{0x03, "Pentium Pro", NULL},
|
||||
{0x10, "Alpha", NULL},
|
||||
{0x20, "PowerPC", NULL},
|
||||
{0x30, "MIPS", NULL},
|
||||
{0x40, "Co-Processor", NULL},
|
||||
{0x80, "Other", NULL},
|
||||
{0, NULL, NULL},
|
||||
};
|
||||
|
||||
pci_device_info info_serial_bus_usb[] = {
|
||||
{0x00, "UHCI (1.0)", NULL},
|
||||
{0x10, "OHCI (1.1)", NULL},
|
||||
{0x20, "EHCI (2.0)", NULL},
|
||||
{0x30, "XHCI (3.0)", NULL},
|
||||
{0x80, "Unspecified", NULL},
|
||||
{0xFE, "Device", NULL},
|
||||
{0, NULL, NULL},
|
||||
};
|
||||
|
||||
pci_device_info info_serial_bus[] = {
|
||||
{0x00, "FireWire", NULL}, // todo sub
|
||||
{0x01, "ACCESS bus", NULL},
|
||||
{0x02, "SSA", NULL},
|
||||
{0x03, "USB", info_serial_bus_usb},
|
||||
{0x04, "Fibre Channel", NULL},
|
||||
{0x05, "SMBus", NULL},
|
||||
{0x06, "InfiniBand", NULL},
|
||||
{0x07, "IPMI Interface", NULL}, // todo sub
|
||||
{0x08, "SERCOS", NULL},
|
||||
{0x09, "CanBus", NULL},
|
||||
{0x80, "Other", NULL},
|
||||
{0, NULL, NULL},
|
||||
};
|
||||
|
||||
pci_device_info info_wireless[] = {
|
||||
{0x00, "IRDA Comp", NULL},
|
||||
{0x01, "Consumer IR", NULL},
|
||||
{0x10, "RF", NULL},
|
||||
{0x11, "Bluetooth", NULL},
|
||||
{0x12, "Broadband", NULL},
|
||||
{0x20, "Ethernet 802.1a", NULL},
|
||||
{0x21, "Ethernet 802.1b", NULL},
|
||||
{0x80, "Other", NULL},
|
||||
{0, NULL, NULL},
|
||||
};
|
||||
|
||||
pci_device_info info_intelligent[] = {
|
||||
{0x00, "I20", NULL},
|
||||
{0, NULL, NULL},
|
||||
};
|
||||
|
||||
pci_device_info info_satellite[] = {
|
||||
{0x01, "Satellite TV", NULL},
|
||||
{0x02, "Satellite Audio", NULL},
|
||||
{0x03, "Satellite Voice", NULL},
|
||||
{0x04, "Satellite Data", NULL},
|
||||
{0, NULL, NULL},
|
||||
};
|
||||
|
||||
pci_device_info info_encryption[] = {
|
||||
{0x00, "Network and Computing", NULL},
|
||||
{0x10, "Entertainment", NULL},
|
||||
{0x80, "Other", NULL},
|
||||
{0, NULL, NULL},
|
||||
};
|
||||
|
||||
pci_device_info info_signal_processing[] = {
|
||||
{0x00, "DPIO Modules", NULL},
|
||||
{0x01, "Performance Counters", NULL},
|
||||
{0x10, "Communication Synchronizer", NULL},
|
||||
{0x20, "Signal Processing Management", NULL},
|
||||
{0x80, "Other", NULL},
|
||||
{0, NULL, NULL},
|
||||
};
|
||||
|
||||
pci_device_info pci_root_info[] = {
|
||||
{0x00, "Unclassified", info_unclassified},
|
||||
{0x01, "Mass Storage", info_mass_storage},
|
||||
{0x02, "Network", info_network_controller},
|
||||
{0x03, "Display", info_display_controller},
|
||||
{0x04, "Multimedia", info_multimedia_controller},
|
||||
{0x05, "Memory", info_memory_controller},
|
||||
{0x06, "Bridge", info_bridge_device},
|
||||
{0x07, "Simple Communication", info_simple_comm},
|
||||
{0x08, "Base System Peripheral", info_base_system_peripheral},
|
||||
{0x09, "Input Device", info_input_device},
|
||||
{0x0a, "Docking", info_docking_station},
|
||||
{0x0b, "Processor", info_processor},
|
||||
{0x0c, "Serial Bus", info_serial_bus},
|
||||
{0x0d, "Wireless", info_wireless},
|
||||
{0x0e, "Intelligent", info_intelligent},
|
||||
{0x0f, "Satellite Comm", info_satellite},
|
||||
{0x10, "Encryption", info_encryption},
|
||||
{0x11, "Signal Processing", info_signal_processing},
|
||||
{0x12, "Processing Accelerator", NULL},
|
||||
{0x13, "Non-Essential", NULL},
|
||||
{0x40, "Co-Processor", NULL},
|
||||
{0xFF, "Unassigned", NULL},
|
||||
{0, NULL, NULL},
|
||||
};
|
||||
|
||||
#endif //NEW_KERNEL_PCI_DEVICES_H
|
||||
Reference in New Issue
Block a user